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1. 发明申请

US20120319246A1 IP PROTECTION 有权
标题翻译： IP保护
公开(公告)号：US20120319246A1
公开(公告)日：2012-12-20
申请号：US13161514
申请日：2011-06-16
申请人： Soon Yoeng TAN , Teck Jung TANG , Ian D. MELVILLE , Yelei Vianna YAO , Yasushi YAMAGATA
发明人： Soon Yoeng TAN , Teck Jung TANG , Ian D. MELVILLE , Yelei Vianna YAO , Yasushi YAMAGATA
IPC分类号： H01L29/06 , G06F17/50
CPC分类号： H01L27/0207 , G06F17/5068 , G06F2217/66 , H01L22/32
摘要： Multi-Project Wafers includes a plurality of chiplets from different IP owners. Non-relevant chiplets are implemented with IP protection to inhibit IP disclosure of non-relevant IP owners.
摘要翻译：多项目晶片包括来自不同IP所有者的多个小芯片。采用知识产权保护措施实施不相关的小白鼠，以防止非相关知识产权拥有者的知识产权披露。

2. 发明申请

US20140268090A1 CROSS TECHNOLOGY RETICLE (CTR) OR MULTI-LAYER RETICLE (MLR) CDU, REGISTRATION, AND OVERLAY TECHNIQUES 有权
标题翻译：跨技术指令（CTR）或多层次（MLR）CDU，注册和覆盖技术
公开(公告)号：US20140268090A1
公开(公告)日：2014-09-18
申请号：US13839894
申请日：2013-03-15
申请人： Guo Xiang NING , Arthur HOTZEL , Paul ACKMANN , Soon Yoeng TAN
发明人： Guo Xiang NING , Arthur HOTZEL , Paul ACKMANN , Soon Yoeng TAN
IPC分类号： G03F7/20
CPC分类号： G03F7/2022 , G03F1/00 , G03F1/38 , G03F1/50 , G03F1/70 , G03F7/70283 , G03F7/70433
摘要： Methods for reducing reticle transmission differences and for optimizing layer placement for overlay in MTRs and CTRs are disclosed. Embodiments include providing a reticle having a prime area and a frame area surrounding the prime area; determining RT differences across the prime area; and providing RT adjustment structures on the reticle to decrease the RT differences. Other embodiments include grouping multiple layers of a semiconductor production flow, the layers for each group having an RT difference less than a predetermined value; and placing the layers on plural ordered reticles of a reticle set, each reticle having multiple image fields, by selecting, for each reticle, layers from a single group and optimizing placement of the layers for overlay. Other embodiments include selectively rotating image fields on a reticle having multiple image fields to improve overlay, or optimizing placement of DDLs on CTRs by placing each design orientation on a different reticle.
摘要翻译：公开了减少掩模传输差异并优化用于覆盖在MTR和CTR中的层布置的方法。实施例包括提供具有主区域和围绕主区域的框区域的掩模版; 确定黄金地区的RT差异; 并在掩模版上提供RT调整结构以减少RT差异。其他实施例包括分组半导体生产流程的多个层，每个组的层具有小于预定值的RT差; 并且通过从单个组中选择针对每个掩模版的层，并且优化用于重叠的层的布置，将层布置在掩模版组的多个有序掩模版上，每个掩模具具有多个图像场。其他实施例包括在具有多个图像场的掩模版上选择性地旋转图像场，以通过将每个设计方向放置在不同的掩模版上来改善覆盖，或优化DDL在CTR上的放置。

3. 发明申请

US20100196805A1 MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE 有权
标题翻译：用于绘制无色相位光刻接触孔的掩模和方法
公开(公告)号：US20100196805A1
公开(公告)日：2010-08-05
申请号：US12695167
申请日：2010-01-28
申请人： Sia Kim TAN , Soon Yoeng TAN , Qun Ying LIN , Huey Ming CHONG , Liang Choo HSIA
发明人： Sia Kim TAN , Soon Yoeng TAN , Qun Ying LIN , Huey Ming CHONG , Liang Choo HSIA
IPC分类号： G03F1/00
CPC分类号： G03F1/34
摘要： A method of making a mask is disclosed. The method includes providing a first and a second mask layers and disposing a first phase shift region on the first mask layer. A second phase shift region is disposed on the second mask layer, wherein the first and second phase shift regions are out of phase. A continuous unit cell is formed in the first phase shift region. The unit cell comprises a center section and distinct extension sections. The extension sections are contiguous to and extend outwards from the center section. The distinct extension sections have a same width as the center section. The second phase shift region is adjacent to the unit cell in the first phase shift region.
摘要翻译：公开了制作掩模的方法。该方法包括提供第一和第二掩模层，并在第一掩模层上设置第一相移区域。第二相移区域设置在第二掩模层上，其中第一和第二相移区域是异相的。在第一相移区域中形成连续单元。单元电池包括中心部分和不同的延伸部分。延伸部分与中心部分相邻并向外延伸。不同的延伸部分具有与中心部分相同的宽度。第二相移区域与第一相移区域中的单元电池相邻。

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