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1. 发明授权

US07088169B2 Low-noise, high-linearity analog multiplier 有权
标题翻译：低噪声，高线性模拟乘法器
公开(公告)号：US07088169B2
公开(公告)日：2006-08-08
申请号：US10781975
申请日：2004-02-18
申请人： Simone Erba , Giampiero Montagna , Mario Valla
发明人： Simone Erba , Giampiero Montagna , Mario Valla
IPC分类号： G05F7/44 , G05G7/16
CPC分类号： H03C1/547 , H03D7/1441 , H03D7/1458 , H03D7/1491
摘要： An analog multiplier for multiplying a first analog voltage signal at a first frequency by a second analog voltage signal at a second frequency, comprising a first stage for converting the first analog voltage signal into a first and a second current signals, and a second stage comprising a first and a second cross-coupled current-switching pairs, driven by the second voltage signal, the first and second current-switching pairs having respective current inputs for receiving the first and the second current signals, respectively. Parasitic capacitances are inherently associated with each current input of the current-switching pairs. A compensation circuit is coupled to the current inputs of the current-switching pairs for compensating the parasitic capacitances.
摘要翻译：一种用于将第一频率的第一模拟电压信号乘以第二频率的第二模拟电压信号的模拟乘法器，包括用于将第一模拟电压信号转换为第一和第二电流信号的第一级，以及包括由第二电压信号驱动的第一和第二交叉耦合电流切换对，第一和第二电流切换对具有分别用于接收第一和第二电流信号的相应的电流输入。寄生电容固有地与电流 - 开关对的每个电流输入相关联。补偿电路耦合到电流 - 开关对的电流输入以补偿寄生电容。

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