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    • 5. 发明申请
    • METHOD AND APPARATUS FOR INTEGRATED HIERARCHICAL ELECTRONICS ANALYSIS
    • 综合分层电子分析方法与装置
    • US20080104553A1
    • 2008-05-01
    • US11549819
    • 2006-10-16
    • Mostafa RassaianDavid W. TwiggJung-Chuan Lee
    • Mostafa RassaianDavid W. TwiggJung-Chuan Lee
    • G06F17/50
    • G06F17/50G06F17/5018G06F17/5095G06F2217/80H05K3/341
    • A computer implemented method, apparatus, and computer usable program code for analyzing durability of electronic components. A finite element model for the chassis is created. A set of finite element models for a set of printed wiring assemblies are created, wherein the printed wiring assemblies are for use with chassis and include the electronic components. The finite element model for the chassis is combined with the set of finite element models to form a combined finite element model. A finite element analysis of the combined finite element model is performed to form results. The combined model results are transferred to the printed wiring board models. Using the transferred results, stresses and strains are calculated for individual solder joints/leads. A fatigue analysis is performed for the electronic components in the set of printed wiring assemblies based on these stresses and strains, using the results to identify the durability of the electronic components.
    • 一种用于分析电子部件的耐久性的计算机实现的方法,装置和计算机可用程序代码。 创建了底盘的有限元模型。 创建了一组用于一组印刷线路组件的有限元模型,其中印刷线路组件用于底盘并且包括电子部件。 底盘的有限元模型与有限元模型组合形成一个组合有限元模型。 进行组合有限元模型的有限元分析,形成结果。 组合的模型结果转移到印刷线路板型号。 使用转移的结果,计算各个焊点/引线的应力和应变。 基于这些应力和应变,对印刷布线组件中的电子部件进行疲劳分析,结果确定电子部件的耐久性。
    • 6. 发明申请
    • Optimal aircraft window shape for noise control
    • 最佳飞机窗口形状用于噪声控制
    • US20070069079A1
    • 2007-03-29
    • US11223297
    • 2005-09-09
    • Mostafa RassaianJung-Chuan LeeJosh MontgomeryPeter GuardMark StadumPaul MikulencakRichard Brigman
    • Mostafa RassaianJung-Chuan LeeJosh MontgomeryPeter GuardMark StadumPaul MikulencakRichard Brigman
    • B64C1/14
    • B64C1/1484
    • A window for a subsonic passenger aircraft that provide maximum optical visibility while minimizing the amount of exterior acoustic noise transmitted through the windows to the passenger cabin during flight of the aircraft includes at least one substantially transparent window pane having the shape of an ellipse. The ellipse has a major axis and a minor axis, and the major axis is about twice as long as the minor axis and is disposed generally perpendicular to the direction of flight of the aircraft. In one exemplary embodiment, the window has a height of about 20 inches and a transparent area of about 141 square inches, and includes a pair of substantially similar window panes disposed in a parallel, spaced-apart relationship circumscribed by a mounting bezel. A plurality of the windows are each mounted with the bezels in spaced-apart rows in each of the opposite sidewalls of the aircraft fuselage.
    • 一种亚音速客机的窗口,其提供最大的光学可视性,同时使在飞机飞行期间通过窗户传输到客舱的外部声学噪声的数量最小化包括至少一个具有椭圆形状的基本上透明的窗格。 椭圆具有长轴和短轴,并且长轴为短轴的大约两倍,并且大致垂直于飞行器的飞行方向设置。 在一个示例性实施例中,窗口具有约20英寸的高度和约141平方英寸的透明面积,并且包括一对基本相似的窗玻璃,其以由安装表圈限定的平行,间隔的关系设置。 在飞行器机身的每个相对侧壁中的每一个中,多个窗口分别安装有间隔开的行。
    • 9. 发明授权
    • Method and apparatus for integrated hierarchical electronics analysis
    • 集成分层电子分析的方法和装置
    • US07558639B2
    • 2009-07-07
    • US11549819
    • 2006-10-16
    • Mostafa RassaianDavid W. TwiggJung-Chuan Lee
    • Mostafa RassaianDavid W. TwiggJung-Chuan Lee
    • G06F17/50G06F19/00
    • G06F17/50G06F17/5018G06F17/5095G06F2217/80H05K3/341
    • A computer implemented method, apparatus, and computer usable program code for analyzing durability of electronic components. A finite element model for the chassis is created. A set of finite element models for a set of printed wiring assemblies are created, wherein the printed wiring assemblies are for use with chassis and include the electronic components. The finite element model for the chassis is combined with the set of finite element models to form a combined finite element model. A finite element analysis of the combined finite element model is performed to form results. The combined model results are transferred to the printed wiring board models. Using the transferred results, stresses and strains are calculated for individual solder joints/leads. A fatigue analysis is performed for the electronic components in the set of printed wiring assemblies based on these stresses and strains, using the results to identify the durability of the electronic components.
    • 一种用于分析电子部件的耐久性的计算机实现的方法,装置和计算机可用程序代码。 创建了底盘的有限元模型。 创建了一组用于一组印刷线路组件的有限元模型,其中印刷线路组件用于底盘并且包括电子部件。 底盘的有限元模型与有限元模型组合形成一个组合有限元模型。 进行组合有限元模型的有限元分析,形成结果。 组合的模型结果转移到印刷线路板型号。 使用转移的结果,计算各个焊点/引线的应力和应变。 基于这些应力和应变,对印刷布线组件中的电子部件进行疲劳分析,结果确定电子部件的耐久性。
    • 10. 发明申请
    • Methods and systems for reducing finite element simulation time for acoustic response analysis
    • 用于声学响应分析的减少有限元模拟时间的方法和系统
    • US20060217943A1
    • 2006-09-28
    • US11089182
    • 2005-03-23
    • Mostafa RassaianThomas ArakawaJeffrey Knowlton
    • Mostafa RassaianThomas ArakawaJeffrey Knowlton
    • G06F17/10
    • G06T17/20G06F17/5018
    • Methods and systems for reducing finite element simulation time for acoustic response analysis are disclosed. In one embodiment, a method includes analytically creating a finite element model, the finite element model including a plurality of subdivisions. A plurality of cross-correlations between respective pairings of the subdivisions is then specified. A portion of the cross-correlations are then eliminated to provide a reduced set of cross-correlations between respective pairings of the subdivisions. The elimination includes determining a spatial distance value between at least two subdivisions, and discarding at least one of the cross-correlations for which the spatial distance value is greater than a specified threshold value. The finite element simulation is then performed using the reduced set of cross-correlations.
    • 公开了用于降低声响应分析的有限元模拟时间的方法和系统。 在一个实施例中,一种方法包括分析地创建有限元模型,所述有限元模型包括多个细分。 然后指定子部分的各个配对之间的多个互相关。 然后消除一部分交叉相关,以便在分组的相应配对之间提供一组减少的互相关。 消除包括确定至少两个细分之间的空间距离值,并且丢弃空间距离值大于指定阈值的交叉相关性中的至少一个。 然后使用减少的交叉相关集来执行有限元模拟。