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1. 发明申请

US20120057399A1 ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOF 审中-公开
标题翻译：不对称虚拟地面单端SRAM及其系统
公开(公告)号：US20120057399A1
公开(公告)日：2012-03-08
申请号：US12876682
申请日：2010-09-07
申请人： Shyh-Jye JOU , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Ming-Chien Tsai
发明人： Shyh-Jye JOU , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Ming-Chien Tsai
IPC分类号： G11C11/00
CPC分类号： G11C11/413
摘要： The present invention discloses an asymmetric virtual-ground single-ended SRAM and a system thereof, wherein a first inverter is coupled to a high potential and a virtual ground, and wherein the first inverter and a second inverter form a latch loop, and wherein a third inverter is electrically connected with the second inverter, and wherein the third inverter and the second inverter are jointly coupled to the high potential and a ground. A write word line and a read word line control an access transistor and a pass transistor to undertake writing and reading of signals. A plurality of asymmetric virtual-ground single-ended SRAMs forms a memory system.
摘要翻译：本发明公开了一种非对称虚拟地单端SRAM及其系统，其中第一反相器耦合到高电位和虚拟地，并且其中第一反相器和第二反相器形成锁存环，并且其中第三反相器与第二反相器电连接，并且其中第三反相器和第二反相器共同耦合到高电位和接地。写字线和读字线控制存取晶体管和传输晶体管以进行信号的写入和读取。多个非对称虚拟地单端SRAM形成存储器系统。

2. 发明申请

US20130194861A1 SINGLE-ENDED SRAM WITH CROSS-POINT DATA-AWARE WRITE OPERATION 有权
标题翻译：具有跨点数据写入操作的单端SRAM
公开(公告)号：US20130194861A1
公开(公告)日：2013-08-01
申请号：US13562330
申请日：2012-07-31
申请人： Shyh-Jye Jou , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Yi-Wei Chiu
发明人： Shyh-Jye Jou , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Yi-Wei Chiu
IPC分类号： G11C11/00
CPC分类号： G11C11/412
摘要： A single-ended SRAM including at least one memory cell and a third switch is provided. The memory cell includes a data-latching unit, a first switch, a second switch and a data-transferring unit. The data-latching unit is configured for latching the received input data and provides a storage data and the inverse data of the storage data. The first switch transfers a reference data to the data-latching unit according to a first word-line signal. The second switch transfers the reference data to the data-latching unit according to a second word-line signal. The data-transferring unit decides whether or not to transfer the reference data to the bit-line according to the storage data and a control signal. The third switch receives the reference data and the control signal and transfers the reference data to the first switch, the second switch and the data-transferring unit according to the control signal.
摘要翻译：提供包括至少一个存储单元和第三开关的单端SRAM。存储单元包括数据锁存单元，第一开关，第二开关和数据传送单元。数据锁存单元被配置为锁存接收到的输入数据，并提供存储数据和存储数据的逆数据。第一开关根据第一字线信号将参考数据传送到数据锁存单元。第二开关根据第二字线信号将参考数据传送到数据锁存单元。数据传送单元根据存储数据和控制信号决定是否将参考数据传送到位线。第三开关接收参考数据和控制信号，并根据控制信号将参考数据传送到第一开关，第二开关和数据传送单元。

3. 发明授权

US08693237B2 Single-ended SRAM with cross-point data-aware write operation 有权
标题翻译：具有跨点数据感知写操作的单端SRAM
公开(公告)号：US08693237B2
公开(公告)日：2014-04-08
申请号：US13562330
申请日：2012-07-31
申请人： Shyh-Jye Jou , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Yi-Wei Chiu
发明人： Shyh-Jye Jou , Jhih-Yu Lin , Ching-Te Chuang , Ming-Hsien Tu , Yi-Wei Chiu
IPC分类号： G11C11/00
CPC分类号： G11C11/412
摘要： A single-ended SRAM including at least one memory cell and a third switch is provided. The memory cell includes a data-latching unit, a first switch, a second switch and a data-transferring unit. The data-latching unit is configured for latching the received input data and provides a storage data and the inverse data of the storage data. The first switch transfers a reference data to the data-latching unit according to a first word-line signal. The second switch transfers the reference data to the data-latching unit according to a second word-line signal. The data-transferring unit decides whether or not to transfer the reference data to the bit-line according to the storage data and a control signal. The third switch receives the reference data and the control signal and transfers the reference data to the first switch, the second switch and the data-transferring unit according to the control signal.
摘要翻译：提供包括至少一个存储单元和第三开关的单端SRAM。存储单元包括数据锁存单元，第一开关，第二开关和数据传送单元。数据锁存单元被配置为锁存接收到的输入数据，并提供存储数据和存储数据的逆数据。第一开关根据第一字线信号将参考数据传送到数据锁存单元。第二开关根据第二字线信号将参考数据传送到数据锁存单元。数据传送单元根据存储数据和控制信号决定是否将参考数据传送到位线。第三开关接收参考数据和控制信号，并根据控制信号将参考数据传送到第一开关，第二开关和数据传送单元。

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