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    • 10. 发明授权
    • Sense amplifier
    • 感应放大器
    • US4558241A
    • 1985-12-10
    • US626795
    • 1984-07-02
    • Yasuo SuzukiHiroshi HiraoYasuaki Suzuki
    • Yasuo SuzukiHiroshi HiraoYasuaki Suzuki
    • G11C7/06G11C11/409G11C11/419G11C11/56H03K5/24G01R19/165G11C11/06H03K3/356
    • G11C11/56G11C11/5692G11C7/065G11C7/06
    • A flip-flop type sense amplifier for a semiconductor memory device is disclosed, the sense amplifier comprising a pair of CMOS inverters cross-coupled with each other to form a CMOS flip-flop circuit having a pair of buffer circuits, for receiving the read-out voltage signals from multi-level memory cells and a predetermined reference voltage, respectively, and a pair of switching circuits for inverting a power source voltage across the flip-flop circuit through common sources of the flip-flop circuit, in response to the transition between a stand-by sequence and a latching operating. The common source of the p-channel transistors of the CMOS flip-flop circuit is connected to a negative potential source, and the common source of the n-channel transistors is connected to a positive potential source during a stand-by sequence, and vice versa, during a latching operation. This unique potential supply method enhances operational speed of the sense amplifier. In a multi-level memory device, a plurality of the sense amplifiers are connected in parallel for the discrimination of the read-out signals changing in a range of a few volts.
    • 公开了一种用于半导体存储器件的触发器型读出放大器,该读出放大器包括一对互相交叉耦合的CMOS反相器,以形成具有一对缓冲电路的CMOS触发器电路, 分别来自多电平存储单元的输出电压信号和预定的参考电压;以及一对开关电路,用于响应于转换,通过触发器电路的公共源来反转触发器电路两端的电源电压 在待机序列和锁定操作之间。 CMOS触发器电路的p沟道晶体管的共同源极连接到负电位源,并且n沟道晶体管的公共源在待机序列期间连接到正电位源, 反之亦然,在锁定操作期间。 这种独特的电位供应方法提高了读出放大器的运行速度。 在多电平存储器件中,多个读出放大器并联连接,用于区分在几伏范围内变化的读出信号。