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1. 发明授权

US08906756B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08906756B2
公开(公告)日：2014-12-09
申请号：US13110314
申请日：2011-05-18
申请人： Shunpei Yamazaki , Ryosuke Watanabe , Suzunosuke Hiraishi , Junichiro Sakata
发明人： Shunpei Yamazaki , Ryosuke Watanabe , Suzunosuke Hiraishi , Junichiro Sakata
IPC分类号： H01L21/00 , H01L21/84 , H01L21/02 , H01L29/786 , H01L27/12
CPC分类号： H01L21/477 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/66969 , H01L29/7869
摘要： An object is to provide a semiconductor device including an oxide semiconductor, which has stable electrical characteristics and high reliability. In a manufacturing process of a bottom-gate transistor including an oxide semiconductor layer, heat treatment in an atmosphere containing oxygen and heat treatment in vacuum are sequentially performed for dehydration or dehydrogenation of the oxide semiconductor layer. In addition, irradiation with light having a short wavelength is performed concurrently with the heat treatment, whereby elimination of hydrogen, OH, or the like is promoted. A transistor including an oxide semiconductor layer on which dehydration or dehydrogenation treatment is performed through such heat treatment has improved stability, so that variation in electrical characteristics of the transistor due to light irradiation or a bias-temperature stress (BT) test is suppressed.
摘要翻译：目的在于提供一种具有稳定的电气特性和高可靠性的氧化物半导体的半导体装置。在包括氧化物半导体层的底栅晶体管的制造工艺中，在氧化物气氛中进行热处理，在真空中进行热处理，依次进行氧化物半导体层的脱水或脱氢。此外，与热处理同时进行具有短波长的光的照射，由此促进氢，OH等的消除。包括通过这种热处理进行脱水或脱氢处理的氧化物半导体层的晶体管具有改善的稳定性，从而抑制了由于光照射或偏压温度应力（BT）测试而导致的晶体管的电特性的变化。

2. 发明授权

US08530892B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08530892B2
公开(公告)日：2013-09-10
申请号：US12917569
申请日：2010-11-02
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/10 , H01L21/16
CPC分类号： H01L29/45 , G02F1/1368 , H01L29/7869
摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using an oxide of a metal whose work function is lower than the work function of the oxide semiconductor layer or an oxide of an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。源极和漏极层具有两层或多层的层叠结构，其中使用其功函数低于氧化物半导体层的功函数的金属的氧化物形成与氧化物半导体层接触的层或含有这种金属的合金的氧化物。使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为组分，包含任何这些元素组合的合金等。

3. 发明申请

US20110227082A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110227082A1
公开(公告)日：2011-09-22
申请号：US13048023
申请日：2011-03-15
申请人： Takayuki Inoue , Masashi Tsubuku , Suzunosuke Hiraishi , Junichiro Sakata , Erumu Kikuchi , Hiromichi Godo , Akiharu Miyanaga , Shunpei Yamazaki
发明人： Takayuki Inoue , Masashi Tsubuku , Suzunosuke Hiraishi , Junichiro Sakata , Erumu Kikuchi , Hiromichi Godo , Akiharu Miyanaga , Shunpei Yamazaki
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/24 , H01L29/41733 , H01L31/032 , H01L31/18
摘要： An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time τ1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
摘要翻译： “安全”陷阱存在的氧化物半导体层表现出光响应特性的两种模式。通过使用氧化物半导体层，可以实现将光劣化抑制到最小并且电特性稳定的晶体管。在光响应特性中表现出两种模式的氧化物半导体层具有1pA至10nA的光电流值。当通过“安全”陷阱捕获载流子的平均时间τ1足够大时，光响应特性即电流值急剧下降的区域和电流值逐渐下降的区域有两种模式在光电流随时间变化的结果中。

4. 发明申请

US20110084269A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE 有权
标题翻译：用于制造半导体器件的半导体器件和方法
公开(公告)号：US20110084269A1
公开(公告)日：2011-04-14
申请号：US12899265
申请日：2010-10-06
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/45
摘要： An object is to reduce contact resistance between an oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer in a thin film transistor including the oxide semiconductor layer. The source and drain electrode layers have a stacked structure of two or more layers. In this stack of layers, a layer in contact with the oxide semiconductor layer is a thin indium layer or a thin indium-alloy layer. Note that the oxide semiconductor layer contains indium. A second layer or second and any of subsequent layers in the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：本发明的目的是减少在包括氧化物半导体层的薄膜晶体管中氧化物半导体层与与氧化物半导体层电连接的源极和漏极电极层之间的接触电阻。源极和漏极电极层具有两层或更多层的堆叠结构。在该堆叠层中，与氧化物半导体层接触的层是薄的铟层或薄的铟 - 合金层。注意，氧化物半导体层含有铟。使用选自Al，Cr，Cu，Ta，Ti，Mo和W的元素来形成源极和漏极电极层中的第二层或第二层以及后续层中的任何一层，包含任何这些元素作为组分的合金，合并这些元素中的任何一种的合金等。

5. 发明授权

US08841662B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08841662B2
公开(公告)日：2014-09-23
申请号：US12917548
申请日：2010-11-02
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/66969 , H01L21/02164 , H01L21/02178 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/7869
摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using a metal whose work function is lower than the work function of the oxide semiconductor layer or an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。源极和漏极电极层具有两层或多层的层叠结构，其中使用功函数低于氧化物半导体层的功函数或合金的金属形成与氧化物半导体层接触的层含有这样的金属。使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为组分，包含任何这些元素组合的合金等。

6. 发明申请

US20110108834A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110108834A1
公开(公告)日：2011-05-12
申请号：US12917569
申请日：2010-11-02
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/24
CPC分类号： H01L29/45 , G02F1/1368 , H01L29/7869
摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using an oxide of a metal whose work function is lower than the work function of the oxide semiconductor layer or an oxide of an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。源极和漏极层具有两层或多层的层叠结构，其中使用其功函数低于氧化物半导体层的功函数的金属的氧化物形成与氧化物半导体层接触的层或含有这种金属的合金的氧化物。使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为组分，包含任何这些元素组合的合金等。

7. 发明授权

US08547493B2 Semiconductor device with indium or zinc layer in contact with oxide semiconductor layer and method for manufacturing the semiconductor device 有权
标题翻译：具有与氧化物半导体层接触的铟或锌层的半导体器件和用于制造半导体器件的方法
公开(公告)号：US08547493B2
公开(公告)日：2013-10-01
申请号：US12899265
申请日：2010-10-06
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： G02F1/136 , G09G3/36 , H01L29/04
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/45
摘要： An object is to reduce contact resistance between an oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer in a thin film transistor including the oxide semiconductor layer. The source and drain electrode layers have a stacked structure of two or more layers. In this stack of layers, a layer in contact with the oxide semiconductor layer is a thin indium layer or a thin indium-alloy layer. Note that the oxide semiconductor layer contains indium. A second layer or second and any of subsequent layers in the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：本发明的目的是减少在包括氧化物半导体层的薄膜晶体管中氧化物半导体层与与氧化物半导体层电连接的源极和漏极电极层之间的接触电阻。源极和漏极电极层具有两层或更多层的堆叠结构。在该堆叠层中，与氧化物半导体层接触的层是薄的铟层或薄的铟 - 合金层。注意，氧化物半导体层含有铟。使用选自Al，Cr，Cu，Ta，Ti，Mo和W的元素来形成源极和漏极电极层中的第二层或第二层和后续层中的任何一层，包含任何这些元素作为组分的合金，合并这些元素中的任何一种的合金等。

8. 发明申请

US20110108833A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110108833A1
公开(公告)日：2011-05-12
申请号：US12917548
申请日：2010-11-02
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/24
CPC分类号： H01L29/66969 , H01L21/02164 , H01L21/02178 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/7869
摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using a metal whose work function is lower than the work function of the oxide semiconductor layer or an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。源极和漏极电极层具有两层或多层的层叠结构，其中使用功函数低于氧化物半导体层的功函数或合金的金属形成与氧化物半导体层接触的层含有这样的金属。使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为组分，包含任何这些元素组合的合金等。

9. 发明授权

US08492758B2 Oxide semiconductor film and semiconductor device 有权
公开(公告)号：US08492758B2
公开(公告)日：2013-07-23
申请号：US12887646
申请日：2010-09-22
申请人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
发明人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
IPC分类号： H01L29/12
CPC分类号： H01L29/78696 , H01L21/2636 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/12 , H01L29/24 , H01L29/41733 , H01L29/66969 , H01L29/7869
摘要： It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.

10. 发明授权

US08309961B2 Semiconductor device, display device, and electronic appliance 有权
标题翻译：半导体装置，显示装置和电子设备
公开(公告)号：US08309961B2
公开(公告)日：2012-11-13
申请号：US12897419
申请日：2010-10-04
申请人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
发明人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
IPC分类号： H01L29/04
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/045 , H01L29/45 , H01L29/78606 , H01L29/78696
摘要： In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.
摘要翻译：在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻可以减少漏电极。

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