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1. 发明授权

US08835918B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08835918B2
公开(公告)日：2014-09-16
申请号：US13608039
申请日：2012-09-10
申请人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/1218 , H01L27/1225
摘要： To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.
摘要翻译：为了提供包括氧化物半导体并且能够高速运行的晶体管或包括晶体管的高度可靠的半导体器件，提供了包括一对低电阻区域和沟道形成区域的氧化物半导体层的晶体管在基底绝缘层上嵌入并且其上表面至少部分地从基底绝缘层露出的电极层上，并且设置在氧化物半导体层上方的布线层电连接到电极层或电极层的一部分氧化物半导体层的低电阻区域与电极层重叠。

2. 发明授权

US08847233B2 Semiconductor device having a trenched insulating layer coated with an oxide semiconductor film 有权
标题翻译：具有涂覆有氧化物半导体膜的沟槽绝缘层的半导体器件
公开(公告)号：US08847233B2
公开(公告)日：2014-09-30
申请号：US13463092
申请日：2012-05-03
申请人： Atsuo Isobe , Toshinari Sasaki , Junichi Koezuka , Shunpei Yamazaki
发明人： Atsuo Isobe , Toshinari Sasaki , Junichi Koezuka , Shunpei Yamazaki
IPC分类号： H01L29/04 , H01L29/10 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L27/01 , H01L27/12 , H01L31/0392 , H01L27/108 , H01L21/84 , H01L49/02 , H01L21/425 , H01L29/66 , H01L29/786 , H01L27/115
CPC分类号： H01L29/4238 , H01L21/02565 , H01L21/265 , H01L21/425 , H01L21/84 , H01L27/1085 , H01L27/10876 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L28/40 , H01L29/045 , H01L29/0847 , H01L29/66477 , H01L29/66742 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L29/78693
摘要： It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.
摘要翻译：本发明的目的是提供一种抑制短路效应并实现小型化的半导体器件及其制造方法。在绝缘层中形成沟槽，并且将杂质添加到与沟槽的上端角部接触的氧化物半导体膜，由此形成源极区域和漏极区域。利用上述结构，可以实现小型化。此外，利用沟槽，即使当源电极层和漏电极层之间的距离缩短时，也可以适当地抑制沟槽的深度适当地设定短沟道效应。

3. 发明授权

US08822989B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08822989B2
公开(公告)日：2014-09-02
申请号：US13613178
申请日：2012-09-13
申请人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
IPC分类号： H01L29/10 , H01L29/786 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/12 , H01L27/1225 , H01L29/10 , H01L29/41733 , H01L29/41775
摘要： Provided is a semiconductor device including a transistor with large on-state current even when it is miniaturized. The transistor includes a pair of first conductive films over an insulating surface; a semiconductor film over the pair of first conductive films; a pair of second conductive films, with one of the pair of second conductive films and the other of the pair of second conductive films being connected to one of the pair of first conductive films and the other of the pair of first conductive films, respectively; an insulating film over the semiconductor film; and a third conductive film provided in a position overlapping with the semiconductor film over the insulating film. Further, over the semiconductor film, the third conductive film is interposed between the pair of second conductive films and away from the pair of second conductive films.
摘要翻译：提供了即使在小型化时也具有大导通状态的晶体管的半导体装置。晶体管包括在绝缘表面上的一对第一导电膜; 在一对第一导电膜上的半导体膜; 一对第二导电膜，其中一对第二导电膜中的一个和一对第二导电膜中的另一个分别连接到一对第一导电膜中的一个和一对第一导电膜中的另一个; 半导体膜上的绝缘膜; 以及设置在与绝缘膜上的半导体膜重叠的位置的第三导电膜。此外，在半导体膜之上，第三导电膜插入在一对第二导电膜之间并远离一对第二导电膜。

4. 发明授权

US08952379B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08952379B2
公开(公告)日：2015-02-10
申请号：US13608044
申请日：2012-09-10
申请人： Shunpei Yamazaki , Atsuo Isobe , Hiromachi Godo , Takehisa Hatano , Sachiaki Tezuka , Suguru Hondo , Naoto Yamade , Junichi Koezuka
发明人： Shunpei Yamazaki , Atsuo Isobe , Hiromachi Godo , Takehisa Hatano , Sachiaki Tezuka , Suguru Hondo , Naoto Yamade , Junichi Koezuka
IPC分类号： H01L29/78 , H01L29/417 , H01L29/786
CPC分类号： H01L29/41733 , H01L29/78618 , H01L29/7869 , H01L29/78693
摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.
摘要翻译：提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

5. 发明授权

US08343816B2 Organic transistor, manufacturing method of semiconductor device and organic transistor 有权
标题翻译：有机晶体管，半导体器件和有机晶体管的制造方法
公开(公告)号：US08343816B2
公开(公告)日：2013-01-01
申请号：US12850652
申请日：2010-08-05
申请人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
发明人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L51/0512 , H01L21/02175 , H01L21/02244 , H01L21/02247 , H01L21/02252 , H01L21/31683 , H01L51/0002 , H01L51/0055 , H01L51/0525 , H01L51/0541 , H01L51/0545 , H01L51/0566
摘要： It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm−3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.
摘要翻译：本发明的目的是形成致密且具有很强绝缘电阻特性的高质量栅极绝缘膜，并且提出了隧道泄漏电流很小的高可靠性有机晶体管。本发明的有机晶体管的一种模式具有如下步骤：通过使用密集的方法形成作为活化氧（或含氧气体）或氮（或含氮气体）的栅极的导电层形成栅极绝缘膜电子密度为1011cm -3以上的等离子体，等离子体活化时电子温度为0.2eV〜2.0eV的范围，直接与成为要被绝缘的栅电极的导体层的一部分反应。

6. 发明申请

US20120214259A1 OXYGEN DIFFUSION EVALUATION METHOD OF OXIDE FILM STACKED BODY 有权
标题翻译：氧化物膜堆积体的氧气扩散评估方法
公开(公告)号：US20120214259A1
公开(公告)日：2012-08-23
申请号：US13213458
申请日：2011-08-19
申请人： Yutaka Okazaki , Keitaro Imai , Atsuo Isobe , Shunpei Yamazaki
发明人： Yutaka Okazaki , Keitaro Imai , Atsuo Isobe , Shunpei Yamazaki
IPC分类号： H01L21/66
CPC分类号： G01N23/2258 , G01N2223/611
摘要： Experience shows that, in a material containing oxygen as a main component, an excess or deficiency of trace amounts of oxygen with respect to a stoichiometric composition, or the like affects properties of the material. An oxygen diffusion evaluation method of an oxide film stacked body includes the steps of: measuring a quantitative value of one of oxygen isotopes of a substrate including a first oxide film and a second oxide film which has an existence proportion of an oxygen isotope different from an existence proportion of an oxygen isotope in the first oxide film in a depth direction, by secondary ion mass spectrometry; and evaluating the one of the oxygen isotopes diffused from the first oxide film to the second oxide film.
摘要翻译：经验表明，在含氧作为主要成分的材料中，相对于化学计量组成等的痕量氧的过量或不足影响材料的性能。氧化膜层叠体的氧扩散评价方法包括以下步骤：测量包含第一氧化物膜和第二氧化物膜的基板的氧同位素的定量值，所述氧化物存在比例与氧同位素通过二次离子质谱法在深度方向上在第一氧化膜中的氧同位素的存在比例; 并评估从第一氧化物膜扩散到第二氧化物膜的氧同位素中的一种。

7. 发明授权

US07718547B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07718547B2
公开(公告)日：2010-05-18
申请号：US12334589
申请日：2008-12-15
申请人： Atsuo Isobe , Satoshi Murakami , Tamae Takano , Shunpei Yamazaki
发明人： Atsuo Isobe , Satoshi Murakami , Tamae Takano , Shunpei Yamazaki
IPC分类号： H01L21/31
CPC分类号： H01L29/66757 , H01L27/12 , H01L27/1248 , H01L29/42384
摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a first insulating film over a substrate, forming a semiconductor film over the first insulating film, oxidizing or nitriding the semiconductor film by conducting a plasma treatment to the semiconductor film under a condition of an electron density of 1×1011 cm−3 or more and 1×1013 cm−3 or less and an electron temperature of 0.5 eV or more and 1.5 eV or less, using a high frequency wave, forming a second insulating film to cover the semiconductor film, forming a gate electrode over the second insulating film, forming a third insulating film to cover the gate electrode, and forming a conductive film over the third insulating film.
摘要翻译：本发明的半导体器件的制造方法包括以下步骤：在衬底上形成第一绝缘膜，在第一绝缘膜上形成半导体膜，通过对半导体膜进行等离子体处理来对半导体膜进行氧化或氮化使用高频波，电子密度为1×10 11 cm -3以上且1×10 13 cm -3以下且电子温度为0.5eV以上1.5eV以下的条件，形成第2绝缘膜覆盖半导体膜，在第二绝缘膜上形成栅电极，形成第三绝缘膜以覆盖栅电极，并在第三绝缘膜上形成导电膜。

8. 发明授权

US07635883B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07635883B2
公开(公告)日：2009-12-22
申请号：US11514973
申请日：2006-09-05
申请人： Munehiro Azami , Chiho Kokubo , Aiko Shiga , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
发明人： Munehiro Azami , Chiho Kokubo , Aiko Shiga , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
IPC分类号： H01L31/062
CPC分类号： H01L21/02678 , H01L21/02683 , H01L21/02691 , H01L21/2026 , H01L27/12 , H01L27/1281 , H01L27/1285 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/66765 , H01L29/78603 , H01L29/78621 , H01L29/78675
摘要： A method for manufacturing a semiconductor device having steps of forming an amorphous semiconductor on a substrate having an insulating surface; patterning the amorphous semiconductor to form plural first island-like semiconductors; irradiating a linearly condensed laser beam on the plural first island-like semiconductors while relatively scanning the substrate, thus crystallizing the plural first island-like semiconductors; patterning the plural first island-like semiconductors that have been crystallized to form plural second island-like semiconductors; forming plural transistors using the plural second island-like semiconductors; and forming a unit circuit using a predetermined number of the transistors, where the second island-like semiconductors used for the predetermined number of the transistors are formed from the first island-like semiconductors that are different from each other.
摘要翻译：一种制造半导体器件的方法，具有在具有绝缘表面的衬底上形成非晶半导体的步骤; 图案化非晶半导体以形成多个第一岛状半导体; 在相对扫描基板的同时，在多个第一岛状半导体上照射线性聚集的激光束，从而使多个第一岛状半导体结晶; 图案化已经结晶以形成多个第二岛状半导体的多个第一岛状半导体; 使用多个第二岛状半导体形成多个晶体管; 并且使用预定数量的晶体管形成单位电路，其中用于预定数量的晶体管的第二岛状半导体由彼此不同的第一岛状半导体形成。

9. 发明授权

US07504663B2 Semiconductor device with a floating gate electrode that includes a plurality of particles 有权
标题翻译：具有包括多个颗粒的浮栅电极的半导体器件
公开(公告)号：US07504663B2
公开(公告)日：2009-03-17
申请号：US11136705
申请日：2005-05-25
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L29/786 , H01L29/788
CPC分类号： H01L27/127 , H01L24/32 , H01L24/73 , H01L27/11526 , H01L27/11546 , H01L27/1214 , H01L27/13 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L2029/7863 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/0106 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/07811 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/01014
摘要： The present invention provides a semiconductor device capable of being mass-produced and a manufacturing method of the semiconductor device. The present invention also provides a semiconductor device using an extreme thin integrated circuit and a manufacturing method of the semiconductor device. Further, the present invention provides a low power consumption semiconductor device and a manufacturing method of the semiconductor device. According to one aspect of the present invention, a semiconductor device that has a semiconductor nonvolatile memory element transistor over an insulating surface in which a floating gate electrode of the memory transistor is formed by a plurality of conductive particles or semiconductor particles is provided.
摘要翻译：本发明提供一种能够大规模生产的半导体器件和该半导体器件的制造方法。本发明还提供了使用极薄集成电路的半导体器件和半导体器件的制造方法。此外，本发明提供一种半导体器件的低功耗半导体器件和制造方法。根据本发明的一个方面，提供了一种在绝缘表面上具有半导体非易失性存储元件晶体管的半导体器件，其中存储晶体管的浮置栅电极由多个导电粒子或半导体粒子形成。

10. 发明授权

US07226817B2 Method of manufacturing 有权
标题翻译：制造方法
公开(公告)号：US07226817B2
公开(公告)日：2007-06-05
申请号：US10330015
申请日：2002-12-27
申请人： Yoshifumi Tanada , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
发明人： Yoshifumi Tanada , Atsuo Isobe , Hiroshi Shibata , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L21/02683 , H01L21/2026 , H01L27/12 , H01L27/1281 , H01L29/04 , H01L29/78603 , H01L29/78606 , H01L29/78675
摘要： A method of efficiently forming a circuit using a thin film transistor with a semiconductor layer in which preferable crystallinity is obtained is provided. A location on which stress concentrates according to crystallization of a semiconductor layer formed on a substrate having unevenness corresponds to the edges and their vicinities of the unevenness provided on the substrate, that is, the boundary between a concave portion and a convex portion and its vicinities. Thus, the location in which stress concentration is caused can be specified and controlled according to the shape of a slit-shaped base layer. In addition, an island-like semiconductor layer (1305) which becomes the active layer of a TFT is formed on the concave portion or the convex portion of the substrate having the unevenness. At this time, at least a portion which becomes the channel formation region of the TFT is formed without crossing the boundary between the concave portion and the convex portion. Such TFTs are used in parallel to construct a TFT having a large channel width so that fluctuation in electrical characteristics is averaged.
摘要翻译：提供一种利用具有优选结晶度的半导体层的薄膜晶体管有效地形成电路的方法。根据形成在具有凹凸的基板上的半导体层的结晶应力集中的位置对应于设置在基板上的凹凸的边缘及其附近，即凹部与凸部之间的边界及其附近。因此，可以根据狭缝状基层的形状来规定和控制应力集中的位置。此外，在具有凹凸的基板的凹部或凸部上形成成为TFT的有源层的岛状半导体层（1305）。此时，成为TFT的沟道形成区域的至少一部分形成为不与凹部和凸部之间的边界交叉。并联使用这样的TFT构成具有较大沟道宽度的TFT，使得电特性的波动平均化。

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