专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4357579A Power amplifier 失效
标题翻译：功率放大器
公开(公告)号：US4357579A
公开(公告)日：1982-11-02
申请号：US195131
申请日：1980-10-08
申请人： Shuichi Kato , Hiromi Kusakabe , Hiroyasu Yamaguchi , Yoshihiro Yoshida
发明人： Shuichi Kato , Hiromi Kusakabe , Hiroyasu Yamaguchi , Yoshihiro Yoshida
IPC分类号： H03F1/30 , H03F3/20 , H03F3/21 , H03F3/26
CPC分类号： H03F1/307 , H03F3/21 , H03F2200/516
摘要： A power amplifier is supplied a DC power source voltage to its power-amplifying circuit from a switching regulator type DC power source. A driver circuit is supplied its DC power source voltage from a non-switching regulator type DC power source like a battery or a series regulator type DC power source, and the DC power source voltage for the driver circuit is limited to a level below the DC power source voltage for the power amplifying circuit to reduce or eliminate spurious emissions based on ripple voltage components on the signal supplied by the DC power source voltage.
摘要翻译：功率放大器从开关调节器型直流电源向其功率放大电路提供直流电源电压。驱动电路从直流电源提供直流电源，如非电压调节器型直流电源，如电池或串联调压型直流电源，驱动电路的直流电源电压限制在低于直流电压用于功率放大电路的电源电压，以基于由直流电源电压提供的信号上的纹波电压分量来减少或消除杂散发射。

2. 发明授权

US4485312A Hysteresis circuit 失效
标题翻译：迟滞电路
公开(公告)号：US4485312A
公开(公告)日：1984-11-27
申请号：US387751
申请日：1982-06-11
申请人： Hiromi Kusakabe , Yoshihiro Yoshida
发明人： Hiromi Kusakabe , Yoshihiro Yoshida
IPC分类号： H03K3/0233 , H03K3/023 , H03K3/2897 , H03K3/29 , H03K5/153
CPC分类号： H03K3/2897 , H03K3/023
摘要： A differential pair of first and second transistors for voltage comparison is provided, and a bias circuit for setting a reference voltage is connected to the base of the second transistor. A differential pair of third and fourth transistors is provided for reference voltage switching. The third and fourth transistors have their bases connected to the collectors of the first and second transistors and their collectors connected to the bias circuit in a positive feedback relation with respect to the base of the first transistor.
摘要翻译：提供用于电压比较的第一和第二晶体管的差分对，并且用于设置参考电压的偏置电路连接到第二晶体管的基极。提供用于参考电压切换的第三和第四晶体管的差分对。第三和第四晶体管的基极连接到第一和第二晶体管的集电极，并且它们的集电极以相对于第一晶体管的基极的正反馈关系连接到偏置电路。

3. 发明授权

US4462005A Current mirror circuit 失效
标题翻译：电流镜电路
公开(公告)号：US4462005A
公开(公告)日：1984-07-24
申请号：US387750
申请日：1982-06-11
申请人： Hiromi Kusakabe , Yoshihiro Yoshida
发明人： Hiromi Kusakabe , Yoshihiro Yoshida
IPC分类号： H03F3/343 , G05F3/26 , H03F3/34 , H03F3/04
CPC分类号： G05F3/265
摘要： A current mirror circuit in which error between input current and output current is small and which can operate with low voltage. First and second current mirror transistors of a first conductivity type have their emitters each connected to a power supply, their bases connected together and their collectors connected to an input terminal and an output terminal respectively. A current amplification factor compensating third transistor of the first conductivity type is provided which has its emitter connected to the bases of the first and second transistors and its collector connected to a reference potential point. A fourth transistor of a second conductivity type is provided for level shifting. This transistor has its collector connected to the emitters of the first and second transistors, its emitter connected to the base of the third transistor and its base connected to the collector of the first transistor. A current source is connected between the third transistor and the reference potential point.
摘要翻译：电流镜电路，输入电流和输出电流之间的误差小，可以低电压工作。第一导电类型的第一和第二电流镜晶体管的发射极各自连接到电源，它们的基极连接在一起，它们的集电极分别连接到输入端和输出端。提供补偿第一导电类型的第三晶体管的电流放大因子，其发射极连接到第一和第二晶体管的基极，其集电极连接到参考电势点。提供第二导电类型的第四晶体管用于电平转换。该晶体管的集电极连接到第一和第二晶体管的发射极，其发射极连接到第三晶体管的基极，其基极连接到第一晶体管的集电极。电流源连接在第三晶体管和参考电位点之间。

4. 发明授权

US4463317A FM demodulator with regulation of the output D.C. component 失效
标题翻译： FM解调器具有调节输出直流分量
公开(公告)号：US4463317A
公开(公告)日：1984-07-31
申请号：US292264
申请日：1981-08-12
申请人： Hiromi Kusakabe
发明人： Hiromi Kusakabe
IPC分类号： H03D3/00
CPC分类号： H03D3/00
摘要： A frequency modulation detector, includes an FM (frequency modulation) demodulator, an adder responsive to first and second signals for maintaining a constant D.C. level output signal, the first signal being the FM signal, and a feedback circuit connected to the adder for comparing the D.C. output level of the adder with a reference signal level to produce the second signal.
摘要翻译：频率调制检测器包括FM（调频）解调器，响应于第一和第二信号的加法器，用于维持恒定的DC电平输出信号，第一信号是FM信号，以及连接到加法器的反馈电路，用于比较具有参考信号电平的加法器的直流输出电平以产生第二信号。

5. 发明授权

US4282490A Pulse count type FM demodulator circuit 失效
标题翻译：脉冲计数型FM解调电路
公开(公告)号：US4282490A
公开(公告)日：1981-08-04
申请号：US006243
申请日：1979-01-24
申请人： Hiromi Kusakabe
发明人： Hiromi Kusakabe
IPC分类号： H03D3/00 , H03D3/04 , H03K9/06
CPC分类号： H03D3/04 , H03D3/00 , H03K9/06
摘要： Disclosed is a demodulator circuit which comprises a limiter circuit, a differentiation circuit, a monostable multivibrator circuit and an integration circuit. The differentiation circuit is composed of a delay circuit and a differential logic circuit. The differentiation circuit supplies the monostable multivibrator circuit with a trigger pulse whose pulse width is determined by the delay circuit. The monostable multivibrator circuit is formed of a differential circuit, having a current source at its output circuit. The current source tends to increase the output voltage of the monostable multivibrator circuit and a driving impedance for the integration circuit.
摘要翻译：公开了一种解调器电路，其包括限幅电路，微分电路，单稳态多谐振荡器电路和积分电路。微分电路由延迟电路和差分逻辑电路组成。微分电路为单稳态多谐振荡器电路提供脉冲宽度由延迟电路确定的触发脉冲。单稳态多谐振荡器电路由差分电路构成，在其输出电路上具有电流源。电流源倾向于增加单稳态多谐振荡器电路的输出电压和积分电路的驱动阻抗。

6. 发明授权

US5111068A Diffusion resistor circuit 失效
标题翻译：扩散电阻电路
公开(公告)号：US5111068A
公开(公告)日：1992-05-05
申请号：US175294
申请日：1988-03-30
申请人： Hiromi Kusakabe
发明人： Hiromi Kusakabe
IPC分类号： H01L27/04 , H01L21/822 , H01L27/08
CPC分类号： H01L27/0802
摘要： A diffusion resistor circuit for reducing distortion caused in a diffusion resistor. The circuit includes the diffusion resistor having a substrate, an island area including an impurity of a first polarity diffused into the substrate and a resistor area including an impurity of a second polarity diffused into the island area, a circuit for supplying a current signal through the resistor area and another circuit connecting the island area to a generally central point of the resistor area for reducing distortion of the current signal.

7. 发明授权

US4733162A Thermal shutoff circuit 失效
标题翻译：热关断电路
公开(公告)号：US4733162A
公开(公告)日：1988-03-22
申请号：US936159
申请日：1986-12-01
申请人： Hiroyuki Haga , Mitsuru Nagata , Hiromi Kusakabe
发明人： Hiroyuki Haga , Mitsuru Nagata , Hiromi Kusakabe
IPC分类号： G05F3/26 , G01K7/01 , G05F3/16 , G05F3/22 , G05F3/20
CPC分类号： G05F3/225 , Y10S323/907
摘要： A thermal shutoff circuit for controlling current to an external circuit in response to changes in the temperature of the shutoff circuit. The thermal shutoff circuit includes a source for supplying a voltage which varies with changes in temperature, and a switch circuit responsive to the temperature variable voltage for interrupting the current to the external circuit when the temperature of the shutoff circuit exceeds a predetermined amount. The switch circuit has a detection transistor having a base connected to the temperature variable voltage source for generating a base current responsive to the temperature variable voltage and a compensation transistor connected in series to the detection transistor for generating an equivalent base current.
摘要翻译：一种热关断电路，用于响应于截止电路的温度变化来控制对外部电路的电流。热关断电路包括用于提供随温度变化而变化的电压的源，以及当切断电路的温度超过预定量时响应于温度可变电压的开关电路，用于中断到外部电路的电流。开关电路具有检测晶体管，其具有连接到温度可变电压源的基极，用于响应于温度可变电压产生基极电流，以及与检测晶体管串联连接以产生等效基极电流的补偿晶体管。

8. 发明授权

US4590433A Doubled balanced differential amplifier circuit with low power consumption for FM modulation or demodulation 失效
标题翻译：双调平衡差分放大器电路，具有低功耗用于FM调制或解调
公开(公告)号：US4590433A
公开(公告)日：1986-05-20
申请号：US596024
申请日：1984-04-02
申请人： Hiromi Kusakabe
发明人： Hiromi Kusakabe
IPC分类号： H03K17/62 , H03C1/54 , H03K17/60 , H04H1/00 , H04H40/45 , H03D1/18 , H03D3/00 , H03K3/281
CPC分类号： H04H40/45 , H03C1/545 , H03K17/603
摘要： A switching circuit apparatus driven by a relatively low DC power supply voltage, which includes a power supply terminal designed to receive a DC power source voltage, a pair of switching circuits comprising switching transistors (28, 30 and 32, 34) connected in parallel with each other and connected to the power supply terminal, first circuit means (10,12) connected for supplying the respective switching circuits with a switched signal, and a second circuit means (16, 18, 40, 14) connected for supplying the respective switching circuits with a pair of control signals which are opposite in phase and which are never both at a potential difference other than a prescribed potential at the same time. The switching circuit transistors (28, 30 or 32, 34) are all fully conductive prior to any transition in which two are rendered non-conductive by the control signals, thereby enable operation of the circuit with low power consumption.
摘要翻译：一种由相对低的直流电源电压驱动的开关电路装置，其包括被设计为接收直流电源电压的电源端子，一对开关电路，包括与三个电容器并联连接的开关晶体管（28,30和32,34）彼此连接并连接到电源端子，连接用于向各个开关电路提供开关信号的第一电路装置（10,12），以及连接用于提供各个开关的第二电路装置（16,18,40,14）具有一对控制信号的电路，该对控制信号相位相反，并且不同时处于除规定电位之外的电位差。开关电路晶体管（28,30或32,34）在通过控制信号使两个不导通的任何转变之前都是完全导通的，从而能够以低功耗进行电路的操作。

9. 发明授权

US4529946A Differential amplifier circuit 失效
标题翻译：差分放大电路
公开(公告)号：US4529946A
公开(公告)日：1985-07-16
申请号：US536789
申请日：1983-09-28
申请人： Hiromi Kusakabe
发明人： Hiromi Kusakabe
IPC分类号： H03F3/45 , H03F1/32
CPC分类号： H03F1/3211
摘要： A differential amplifier circuit producing sufficient output current with a broad linear working range, which includes first and second transistors coupled at their emitters in differential amplifier configuration, an input circuit means connected between the bases of the first and second transistors, third and fourth transistors connected to the collectors of the first and second transistors constituting collector loads of the first and second transistors respectively, first resistor inserted between the bases of the third and fourth transistors, second and third resistors respectively inserted between the base and collector of each of the third and fourth transistors, and an output circuit means connected to the third and fourth transistors.
摘要翻译：差分放大器电路产生具有宽线性工作范围的足够的输出电流，其包括以差分放大器配置耦合在其发射极处的第一和第二晶体管，连接在第一和第二晶体管的基极之间的输入电路装置，连接第三和第四晶体管分别构成第一和第二晶体管的集电极负载的第一和第二晶体管的集电极，分别插入在第三和第四晶体管的基极之间的第一电阻器，分别插入在第三和第四晶体管的基极之间的第二和第三电阻器，第四晶体管，以及连接到第三和第四晶体管的输出电路装置。

10. 发明授权

US07292276B2 High-speed solid-state imaging device capable of suppressing image noise 失效
标题翻译：能够抑制图像噪声的高速固态成像装置
公开(公告)号：US07292276B2
公开(公告)日：2007-11-06
申请号：US10875780
申请日：2004-06-25
申请人： Yoshitaka Egawa , Yoriko Tanaka , Shinji Ohsawa , Yukio Endo , Hiromi Kusakabe , Nagataka Tanaka
发明人： Yoshitaka Egawa , Yoriko Tanaka , Shinji Ohsawa , Yukio Endo , Hiromi Kusakabe , Nagataka Tanaka
IPC分类号： H04N3/14
CPC分类号： H04N5/3658 , H04N5/3575 , H04N5/3591 , H04N5/361 , H04N5/3698 , H04N5/374 , H04N5/3741 , H04N5/378
摘要： In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.
摘要翻译：在CMOS图像传感器中，对于每个水平线的读取操作，抑制了一系列噪声去除操作之后的电流泄漏，从而抑制了图像传感器的输出显示屏幕上出现的图像噪声。提供信号存储区域，用于将从成像区域中选择的同一行中的单位单元读取的信号存储到垂直信号线和水平选择晶体管上，用于顺序选择和读取存储在各个信号存储区域中的信号并将其传送到读取水平信号线。至少在从信号存储区读取信号的期间中，与垂直信号线和水平信号线之间的信号路径电连接的晶体管的漏极和源极之一相对于衬底区域。两个相邻的水平选择晶体管形成一对。每对中的水平选择晶体管共享源极/漏极区域中的一个，以便与水平信号线共同连接，源极/漏极区域中的另一个分别连接到垂直信号线。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式