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    • 7. 发明授权
    • Data processing system having a storage controller for transferring an
arbitrary amount of data at an arbitrary address boundary between
storages
    • 具有存储控制器的数据处理系统,用于在存储之间的仲裁地址边界传输数据的仲裁数据
    • US5134698A
    • 1992-07-28
    • US409764
    • 1989-09-20
    • Jiro ImamuraHiroyuki Okura
    • Jiro ImamuraHiroyuki Okura
    • G06F12/06G06F9/308G06F9/315G06F12/00
    • G06F9/30018G06F9/30032
    • A data processing system which encludes an instruction processor, a storage controller, a main storage, and an extended storage. The storage controller contains a data transfer unit for transferring data between the main storage and the extended storage by an instruction from the instruction process specifying an amount of the data to be transferred. The data transfer unit is provided in the storage controller and with a data buffer and an address addition-subtraction circuit for operating a source address and a destination address. The data is transferred between the main storage and the extended storage by sending to a firmware of a storage control a main storage real address translated from a main storage virtual address specified by the instruction, the number of data to be transferred from the main storage, an extended storage real address, and the number of bytes to be transferred from the extended storage, in a manner so as to match with a unit of data to be processed on the extended storage.
    • 包含指令处理器,存储控制器,主存储器和扩展存储器的数据处理系统。 存储控制器包括用于通过指定要传送的数据的量的指令处理的指令在主存储器和扩展存储器之间传送数据的数据传送单元。 数据传送单元设置在存储控制器中,并具有用于操作源地址和目的地地址的数据缓冲器和地址加减运算电路。 通过向存储控制器的固件发送从指令指定的主存储虚拟地址转换的主存储实际地址,从主存储器传送的数据的数量,将数据传送到主存储器和扩展存储器之间, 扩展存储实地址和要从扩展存储器传送的字节数,以便与在扩展存储器上要处理的数据单元匹配。
    • 8. 发明授权
    • Storage control apparatus
    • 存储控制装置
    • US5140682A
    • 1992-08-18
    • US376870
    • 1989-07-07
    • Hiroyuki OkuraJiro ImamuraNorio YamamotoMasaya Watanabe
    • Hiroyuki OkuraJiro ImamuraNorio YamamotoMasaya Watanabe
    • G06F12/00G06F12/08G06F12/12G06F13/18
    • G06F12/0884G06F13/18G06F12/0857
    • A storage control apparatus contains plural request stacks for storing the access request; a stack selecting circuit for selecting a request stack by accepting the access requests one after another and for storing the access request; and a priority determining circuit for selecting the access request stored in said request stack in order of priority and makes access to a main storage unit in response to an access request from an input-output processor, instruction processor and the like. When memory access requests are issued continuously from the unit as a source of issuing the same access request to the storage control apparatus, the access request which follows can make access to a cache memory while the previous request is making access to the main storage unit, thereby preventing a reduction in a total throughput.
    • 存储控制装置包含用于存储访问请求的多个请求堆栈; 一个堆栈选择电路,用于通过一个接一个地接受访问请求并存储访问请求来选择请求堆栈; 以及优先级确定电路,用于按照优先顺序选择存储在所述请求堆栈中的访问请求,并且响应于来自输入输出处理器,指令处理器等的访问请求访问主存储单元。 当存储器访问请求作为向存储控制装置发出相同访问请求的源而从该单元连续地发出时,随后的访问请求可以在先前请求访问主存储单元时访问高速缓冲存储器, 从而防止总吞吐量的降低。
    • 10. 发明授权
    • Multi-processor system having shared memory for storing the
communication information used in communicating between processors
    • 具有用于存储在处理器之间通信中使用的通信信息的共享存储器的多处理器系统
    • US5446841A
    • 1995-08-29
    • US898688
    • 1992-06-15
    • Masahiro KitanoYoshitaka OhfusaKatsuya KohdaKeiichi SasakiHiroyuki OkuraKatsumi Takeda
    • Masahiro KitanoYoshitaka OhfusaKatsuya KohdaKeiichi SasakiHiroyuki OkuraKatsumi Takeda
    • G06F15/167G06F12/08G06F13/00
    • G06F15/167
    • An information processing system comprises: plural processors; a shared memory connected to the plurality of processors for enabling communication between the processors; a unit disposed in the shared memory for storing information for specifying a processor connected thereto; and a unit for checking, when a first processor communicates with a second processor, whether or not the first and second processors are connected to the shared memory for direct access thereto by referring to the information storing means. A method of communication between processors used with a multiprocessor system, comprises the steps of: storing information for specifying a processor connected to the shared memory for direct access thereto in a predetermined register of the shared memory; feeding a communication instruction for instructing a first processor to communicate with a second processor via the shared memory; checking, in response to the communication instruction, whether or not the first and second processors are connected to the shared memory to enable direct access; storing communication information from the first processor in the shared memory, in response to confirmation that the first and second processors are connected to the shared memory; feeding a communication read interruption from the shared memory to the second processor; and reading out, in response to the communication read interruption, the communication information from the shared memory to feed the communication information to the second processor.
    • 一种信息处理系统,包括:多个处理器; 连接到所述多个处理器的共享存储器,用于实现所述处理器之间的通信; 设置在所述共享存储器中用于存储用于指定与其连接的处理器的信息的单元; 以及用于当第一处理器与第二处理器通信时,通过参考信息存储装置来检查第一和第二处理器是否连接到共享存储器以进行直接访问的单元。 一种与多处理器系统使用的处理器之间的通信方法,包括以下步骤:存储用于指定连接到共享存储器的处理器的信息,以便在共享存储器的预定寄存器中直接访问; 馈送用于指示第一处理器经由共享存储器与第二处理器通信的通信指令; 响应于所述通信指令,检查所述第一处理器和所述第二处理器是否连接到所述共享存储器以使得能够直接访问; 响应于第一和第二处理器连接到共享存储器的确认,存储来自共享存储器中的第一处理器的通信信息; 将来自共享存储器的通信读取中断馈送到第二处理器; 并且响应于通信读取中断读出来自共享存储器的通信信息,以将通信信息馈送到第二处理器。