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1. 发明授权

US07986003B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07986003B2
公开(公告)日：2011-07-26
申请号：US11828616
申请日：2007-07-26
申请人： Shinji Aono , Hideki Takahashi , Yoshifumi Tomomatsu , Junichi Moritani
发明人： Shinji Aono , Hideki Takahashi , Yoshifumi Tomomatsu , Junichi Moritani
IPC分类号： H01L29/739
CPC分类号： H01L29/7397 , H01L29/0834 , H01L29/1095 , H01L29/66348
摘要： A carrier storage layer is located in a region of a predetermined depth from a surface of an N− substrate, a base region is located in a shallower region than the predetermined depth and an emitter region is located in a surface of the N− substrate. The carrier storage layer is formed by phosphorus injected to have a maximum impurity concentration at the predetermined depth, the base region is formed by boron injected to have the maximum impurity concentration at a shallower position than the predetermined depth and the emitter region is formed by arsenic injected to have the maximum impurity concentration at the surface of the N− substrate. An opening is formed to extend through the emitter region, base region and the carrier storage layer. On the inner wall of the opening, a gate electrode is formed with a gate insulating film therebetween.
摘要翻译：载体存储层位于距离N基板的表面的预定深度的区域中，基极区域位于比预定深度更浅的区域中，并且发射极区域位于N基板的表面中。载体存储层由注入的磷形成，以在预定深度具有最大杂质浓度，基底区域由注入的硼形成，使其具有比预定深度更浅的位置的最大杂质浓度，并且发射极区域由砷形成注入到在N-底物的表面具有最大的杂质浓度。形成开口以延伸穿过发射极区域，基极区域和载流子存储层。在开口的内壁上形成有栅极绝缘膜。

2. 发明申请

US20080197379A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080197379A1
公开(公告)日：2008-08-21
申请号：US11828616
申请日：2007-07-26
申请人： Shinji AONO , Hideki Takahashi , Yoshifumi Tomomatsu , Junichi Moritani
发明人： Shinji AONO , Hideki Takahashi , Yoshifumi Tomomatsu , Junichi Moritani
IPC分类号： H01L29/74 , H01L21/332
CPC分类号： H01L29/7397 , H01L29/0834 , H01L29/1095 , H01L29/66348
摘要： A carrier storage layer is located in a region of a predetermined depth from a surface of an N− substrate, a base region is located in a shallower region than the predetermined depth and an emitter region is located in a surface of the N− substrate. The carrier storage layer is formed by phosphorus injected to have a maximum impurity concentration at the predetermined depth, the base region is formed by boron injected to have the maximum impurity concentration at a shallower position than the predetermined depth and the emitter region is formed by arsenic injected to have the maximum impurity concentration at the surface of the N− substrate. An opening is formed to extend through the emitter region, base region and the carrier storage layer. On the inner wall of the opening, a gate electrode is formed with a gate insulating film therebetween.
摘要翻译：载体存储层位于距离N基板的表面的预定深度的区域中，基极区域位于比预定深度更浅的区域中，并且发射极区域位于N基板的表面中。载体存储层由注入的磷形成，以在预定深度具有最大杂质浓度，基底区域由注入的硼形成，使其具有比预定深度更浅的位置的最大杂质浓度，并且发射极区域由砷形成注入到在N-底物的表面具有最大的杂质浓度。形成开口以延伸穿过发射极区域，基极区域和载流子存储层。在开口的内壁上形成有栅极绝缘膜。

3. 发明申请

US20100032711A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100032711A1
公开(公告)日：2010-02-11
申请号：US12344947
申请日：2008-12-29
申请人： Shinji Aono , Junichi Moritani
发明人： Shinji Aono , Junichi Moritani
IPC分类号： H01L29/739 , H01L21/331
CPC分类号： H01L29/7397 , H01L29/0834 , H01L29/47
摘要： A p-type region is provided on a first n-type region. A second n-type region is provided on the p-type region, spaced apart from the first n-type region by the p-type region. A gate electrode serves to form an n-channel between the first and second n-type regions. A first electrode is electrically connected to each of the p-type region and the second n-type region. A second electrode is provided on the first n-type region such that it is spaced apart from the p-type region by the first n-type region and at least a part thereof is in contact with the first n-type region. The second electrode is made of any of metal and alloy and serves to inject holes into the first n-type region.
摘要翻译： p型区域设置在第一n型区域上。第二n型区域设置在p型区域上，通过p型区域与第一n型区域间隔开。栅极用于在第一和第二n型区域之间形成n沟道。第一电极电连接到p型区域和第二n型区域中的每一个。第二电极设置在第一n型区域上，使得其与第一n型区域的p型区域间隔开，并且其第一电极的至少一部分与第一n型区域接触。第二电极由金属和合金中的任一种制成，用于将孔注入第一n型区域。

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