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    • 1. 发明授权
    • Information processor and method of its component arrangement
    • 信息处理器及其组件安装方法
    • US6108731A
    • 2000-08-22
    • US117741
    • 1998-08-04
    • Shinichi SuzukiTsunehiro TobitaYoshitsugu IchiedaHiroyuki HodoMihoko KudouTetsuo HiramitsuHideki OsakaTsutomu Hara
    • Shinichi SuzukiTsunehiro TobitaYoshitsugu IchiedaHiroyuki HodoMihoko KudouTetsuo HiramitsuHideki OsakaTsutomu Hara
    • G06F1/18G06F13/00
    • G06F1/185G06F1/184G06F1/186
    • A plurality of processor elements (31 to 34) are disposed on a main board (710) in line in parallel with a first edge of the main substrate (710). Expansion board slots (331 to 336) into which an expansion board for mounting an I/O interface thereon is plugged and a memory connector (341) to which a memory board for mounting a memory thereon is connected are disposed in a region of the main substrate opposite to the first edge. The long sides of the expansion board slots (331 to 336) and the memory board connector (341) are in parallel with the first edge. A bridge LSI for executing protocol conversion between processor buses (210, 211, 212) and an I/O bus (230) and memory controllers (151, 152) for controlling memory access are disposed in regions adjacent to both the expansion board slots and the processor elements. The processor bus (210, 211, 212) is bent into a protuberance shape so that a branch does not substantially form and the bridge LSI and memory controller are substantially at the middle portion of a plurality of processors. The processor bus connects the processor elements, the bridge LSI and the memory controller in this order.
    • PCT No.PCT / JP96 / 00285 Sec。 371日期:1998年8月4日 102(e)1998年8月4日PCT PCT 1996年2月9日PCT公布。 出版物WO97 / 29415 日期1997年8月14日多个处理器元件(31〜34)与主基板(710)的第一边缘平行配置在主板(710)上。 在其上插入有用于安装I / O接口的扩展板的扩展板插槽(331至336)和连接有用于安装其上的存储器的存储器板的存储器连接器(341)设置在主体的区域中 基板与第一边缘相对。 扩展板槽(331〜336)和存储板连接器(341)的长边与第一边缘平行。 用于在处理器总线(210,211,212)和用于控制存储器存取的I / O总线(230)和存储器控制器(151,152)之间执行协议转换的桥式LSI被布置在与扩展板插槽和 处理器元件。 处理器总线(210,211,212)弯曲成突起形状,使得分支基本上不形成,并且桥接器LSI和存储器控制器基本上位于多个处理器的中间部分。 处理器总线按顺序连接处理器元件,桥接器LSI和存储器控制器。