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    • 1. 发明授权
    • Low-dropout regulator
    • 低压差稳压器
    • US08148961B2
    • 2012-04-03
    • US12859851
    • 2010-08-20
    • Sang Hoon HaSang Hee KimJun Kyung NaShinichi Iizuka
    • Sang Hoon HaSang Hee KimJun Kyung NaShinichi Iizuka
    • G05F1/00
    • G05F1/575
    • A low-dropout regulator includes: a first operational amplifier having a first input receiving an input voltage; a first P-channel MOSFET having a gate connected to an output of the first operational amplifier, a source connected to a power source terminal, and a drain connected to an output terminal; a feedback circuit providing at least portion of a voltage of the output terminal as a feedback to a second input of the first operational amplifier; and a triode limiter circuit receiving voltages at the source and the gate of the first P-channel MOSFET comparing a voltage difference therebetween with a predetermined reference voltage, and increasing a voltage of the second input of the first operational amplifier when the voltage difference is the same as the reference voltage.
    • 低压差稳压器包括:具有接收输入电压的第一输入的第一运算放大器; 第一P沟道MOSFET,其具有连接到第一运算放大器的输出的栅极,连接到电源端子的源极和连接到输出端子的漏极; 反馈电路,其将所述输出端子的电压的至少一部分提供为所述第一运算放大器的第二输入端的反馈; 以及三极限动器电路,其在所述第一P沟道MOSFET的源极和栅极处接收电压,将其间的电压差与预定参考电压进行比较,并且当所述电压差为所述第一运算放大器的电压差时,增加所述第一运算放大器的第二输入的电压 与参考电压相同。
    • 2. 发明申请
    • LOW-DROPOUT REGULATOR
    • 低压差稳压器
    • US20110156677A1
    • 2011-06-30
    • US12859851
    • 2010-08-20
    • Sang Hoon HaSang Hee KimJun Kyung NaShinichi Iizuka
    • Sang Hoon HaSang Hee KimJun Kyung NaShinichi Iizuka
    • G05F1/10
    • G05F1/575
    • There is provided a low-dropout regulator capable of preventing transistors from operating in a triode or deep triode region. A low-dropout regulator according to an aspect of the invention may include: a first operational amplifier having a first input receiving an input voltage; a first P-channel MOSFET having a gate connected to an output of the first operational amplifier, a source connected to a power source terminal, and a drain connected to an output terminal; a feedback circuit providing at least portion of a voltage of the output terminal as a feedback to a second input of the first operational amplifier; and a triode limiter circuit receiving voltages at the source and the gate of the first P-channel MOSFET comparing a voltage difference therebetween with a predetermined reference voltage, and increasing a voltage of the second input of the first operational amplifier when the voltage difference is substantially the same as the reference voltage to thereby prevent the first P-channel MOSFET from entering a triode mode or a deep triode mode.
    • 提供了一种能够防止晶体管在三极管或深三极管区域中工作的低压差稳压器。 根据本发明的一个方面的低压降稳压器可以包括:具有接收输入电压的第一输入的第一运算放大器; 第一P沟道MOSFET,其具有连接到第一运算放大器的输出的栅极,连接到电源端子的源极和连接到输出端子的漏极; 反馈电路,其将所述输出端子的电压的至少一部分提供为所述第一运算放大器的第二输入端的反馈; 以及三极限动器电路,其在所述第一P沟道MOSFET的源极和栅极处接收电压,将其间的电压差与预定参考电压进行比较,并且当所述电压差基本上等于所述第一运算放大器的所述第二输入的电压时, 与参考电压相同,从而防止第一P沟道MOSFET进入三极管模式或深三极管模式。
    • 4. 发明授权
    • Voltage level shifter
    • 电压电平转换器
    • US08476957B2
    • 2013-07-02
    • US13309155
    • 2011-12-01
    • Shinichi IizukaJun Kyung NaSang Hoon HaYoun Suk Kim
    • Shinichi IizukaJun Kyung NaSang Hoon HaYoun Suk Kim
    • H03L5/00
    • H03F3/505
    • Provided is a voltage level shifter changing an input voltage level and outputting the input voltage. There is provided the voltage level shifter, including: an operational amplifier having a first input having an applied input voltage thereto; a first MOSFET having a gate connected to an output of the operational amplifier, a source having an applied power thereto, and a drain outputting an output voltage; a voltage dividing resistor unit including a plurality of voltage dividing resistors sequentially connected to the drain of the first MOSFET in series, one connection node between the plurality of voltage dividing resistors being connected to the second input of the operational amplifier; and a second MOSFET having a source and a drain, respectively connected to both ends of at least one of the voltage dividing resistors, and a gate connected to the gate of the first MOSFET.
    • 提供了改变输入电压电平并输出输入电压的电压电平移位器。 提供了电压电平移位器,包括:具有对其施加的输入电压的第一输入的运算放大器; 第一MOSFET,其具有连接到运算放大器的输出的栅极,具有施加功率的源和输出输出电压的漏极; 分压电阻器单元,包括多个分压电阻,其顺序地连接到第一MOSFET的漏极,多个分压电阻器之间的一个连接节点连接到运算放大器的第二输入; 以及分别连接到至少一个分压电阻器的两端的源极和漏极以及连接到第一MOSFET的栅极的栅极的第二MOSFET。
    • 5. 发明授权
    • Level shifter
    • 电平移位器
    • US08525570B2
    • 2013-09-03
    • US13212824
    • 2011-08-18
    • Sang Hoon HaShinichi IizukaYoun Suk KimJun Kyung Na
    • Sang Hoon HaShinichi IizukaYoun Suk KimJun Kyung Na
    • H03L5/00
    • H03K19/0175H03F2203/45138
    • A level shifter includes: a first buffer amplifier transferring a preset reference voltage to a first output terminal; a second buffer amplifier connected in parallel to the first buffer amplifier and transferring an input voltage to a second output terminal; a positive feedback amplifier connected in parallel to the first buffer amplifier and the second buffer amplifier, and amplifying the input voltage by a preset gain to transfer the amplified input voltage to a third output terminal; and a level regulation unit regulating levels of output signals of the first buffer amplifier, the second buffer amplifier, and the positive feedback amplifier and providing the regulated output signals to a common output node.
    • 电平移位器包括:第一缓冲放大器,将预设参考电压传送到第一输出端; 与第一缓冲放大器并联连接并将输入电压传送到第二输出端的第二缓冲放大器; 与第一缓冲放大器和第二缓冲放大器并联连接的正反馈放大器,并且通过预设增益放大输入电压以将放大的输入电压传送到第三输出端子; 以及电平调节单元,其调节第一缓冲放大器,第二缓冲放大器和正反馈放大器的输出信号的电平,并将调节的输出信号提供给公共输出节点。
    • 6. 发明申请
    • POWER AMPLIFIER SYSTEM
    • 功率放大器系统
    • US20130049870A1
    • 2013-02-28
    • US13569519
    • 2012-08-08
    • Jun Kyung NASang Hoon HaShinichi IizukaYoun Suk Kim
    • Jun Kyung NASang Hoon HaShinichi IizukaYoun Suk Kim
    • H03F3/04
    • H03F1/0261H03F3/21
    • Disclosed herein is a power amplifier system, including: a power amplifier; a first regulator generating driving voltage Vd and driving current Id corresponding to preset first reference voltage; a current controller controlling the driving current Id of the first regulator corresponding to applied control voltage; a first resistor connected between the first regulator and the current controller and a second resistor connected between the first regulator and the power amplifier, a bias controller detecting current and voltage corresponding to the driving current and controlling bias current of the power amplifier according to the detected voltage; and a second regulator generating power supply voltage corresponding to preset second reference voltage, whereby characteristics of the power amplifier can be improved by constantly controlling current supplied to the power amplifier even though the input voltage applied to the power amplifier system is increased.
    • 本文公开了一种功率放大器系统,包括:功率放大器; 产生对应于预设的第一参考电压的驱动电压Vd和驱动电流Id的第一调节器; 控制与所施加的控制电压对应的第一调节器的驱动电流Id的电流控制器; 连接在第一调节器和电流控制器之间的第一电阻器和连接在第一调节器和功率放大器之间的第二电阻器,偏置控制器,检测对应于驱动电流的电流和电压,以及根据检测到的功率放大器的控制偏置电流 电压; 以及第二调节器,其产生对应于预设的第二参考电压的电源电压,由此即使施加到功率放大器系统的输入电压增加,也可以通过不断地控制提供给功率放大器的电流来提高功率放大器的特性。
    • 7. 发明申请
    • LEVEL SHIFTER
    • 水平变化
    • US20120049925A1
    • 2012-03-01
    • US13212824
    • 2011-08-18
    • Sang Hoon HaShinichi IizukaYoun Suk KimJun Kyung Na
    • Sang Hoon HaShinichi IizukaYoun Suk KimJun Kyung Na
    • H03L5/00
    • H03K19/0175H03F2203/45138
    • A level shifter includes: a first buffer amplifier transferring a preset reference voltage to a first output terminal; a second buffer amplifier connected in parallel to the first buffer amplifier and transferring an input voltage to a second output terminal; a positive feedback amplifier connected in parallel to the first buffer amplifier and the second buffer amplifier, and amplifying the input voltage by a preset gain to transfer the amplified input voltage to a third output terminal; and a level regulation unit regulating levels of output signals of the first buffer amplifier, the second buffer amplifier, and the positive feedback amplifier and providing the regulated output signals to a common output node.
    • 电平移位器包括:第一缓冲放大器,将预设参考电压传送到第一输出端; 与第一缓冲放大器并联连接并将输入电压传送到第二输出端的第二缓冲放大器; 与第一缓冲放大器和第二缓冲放大器并联连接的正反馈放大器,并且通过预设增益放大输入电压以将放大的输入电压传送到第三输出端子; 以及电平调节单元,其调节第一缓冲放大器,第二缓冲放大器和正反馈放大器的输出信号的电平,并将调节的输出信号提供给公共输出节点。
    • 8. 发明授权
    • Power amplifying apparatus with dual-current control mode
    • 具有双电流控制模式的功率放大装置
    • US08502606B2
    • 2013-08-06
    • US13324286
    • 2011-12-13
    • Youn Suk KimJun Kyung NaSang Hoon HaShinichi Iizuka
    • Youn Suk KimJun Kyung NaSang Hoon HaShinichi Iizuka
    • H03F3/04
    • H03F1/0272H03F3/195H03F2200/91
    • There is provided a power amplifying apparatus with dual-current control mode, including: a transistor mirror circuit adjusting currents respectively flowing through a main path and a mirror path connected in parallel to a power source terminal; a resistor mirror circuit adjusting the respective currents of the main path and the mirror path; a current controlling unit controlling a control current flowing through the main path with a pre-set constant current; a voltage adjusting unit providing a bias adjustment signal that corresponds to a difference voltage between a first voltage of a first node on the main path to which a current is output from the resistor mirror circuit and a second voltage of a second node on the mirror path to which a current is output from the resistor mirror circuit; and a bias circuit unit adjusting a bias of a power amplifying unit.
    • 提供一种具有双电流控制模式的功率放大装置,包括:晶体管反射镜电路,其调节分别流过与电源端并联连接的主路径和反射镜路径的电流; 电阻镜电路,调整主路径和反射镜路径的各自的电流; 电流控制单元,用预定的恒定电流控制流经主路径的控制电流; 电压调节单元,其提供偏置调整信号,该偏置调整信号对应于电流从电阻镜电路输出的主路径上的第一节点的第一电压与反射镜路径上的第二节点的第二电压之间的差电压 从电阻镜电路输出电流; 以及调整功率放大单元的偏置的偏置电路单元。
    • 10. 发明授权
    • Power control system and power amplification system using the same
    • 功率控制系统和功率放大系统使用相同
    • US08497668B2
    • 2013-07-30
    • US12940155
    • 2010-11-05
    • Sang Hoon HaShinichi IizukaYoun Suk KimChul Hwan YoonJun Kyung Na
    • Sang Hoon HaShinichi IizukaYoun Suk KimChul Hwan YoonJun Kyung Na
    • G05F1/40
    • H03F1/0211H03F2200/78
    • A power control system includes a power regulator having a plurality of power PMOS transistors connected to a power source in parallel and configured to supply current and voltage controlled according to an input lamp voltage, a current sensing unit connected to the power source and configured to sense currents flowing through a plurality of target PMOS transistors located at predetermined positions among the PMOS transistors, a current mirror unit connected to a first regulated voltage terminal and configured to generate a plurality of currents equal to the sensed currents, a comparator unit configured to total the generated currents to convert the totaled currents into a voltage, and to generate a voltage difference between the voltage and a predetermined reference voltage, and a current bias circuit unit connected to a second regulated voltage terminal and configured to control a bias current according to the generated voltage difference.
    • 电力控制系统包括功率调节器,其具有并联连接到电源的多个功率PMOS晶体管,并且被配置为根据输入灯电压供应电流和电压;电流感测单元,连接到电源并被配置为感测 流过位于PMOS晶体管中的预定位置的多个目标PMOS晶体管的电流,连接到第一调节电压端并被配置为产生等于感测电流的多个电流的电流镜单元,比较器单元, 产生电流以将总电流转换成电压,并产生电压与预定参考电压之间的电压差;以及电流偏置电路单元,连接到第二调节电压端并被配置为根据所产生的电压控制偏置电流 电压差。