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    • 2. 发明申请
    • INTAKE MANIFOLD
    • 吸入歧管
    • US20110315109A1
    • 2011-12-29
    • US13160835
    • 2011-06-15
    • Takeshi NOMURA
    • Takeshi NOMURA
    • F02M35/104
    • F02M35/1165F02M35/10327F02M35/1036
    • An intake manifold includes a surge tank and a plurality of inlet pipes extending from the surge tank. Of the inlet pipes, proximal portions of an adjacent pair of inlet pipes are integrated, for example, by being connected with a plate-like connecting portion. The proximal portions of the two adjacent inlet pipes are integrated with a side wall of the surge tank by a reinforcing rib. The reinforcing rib extends, for example, from the connecting portion to the side wall of the surge tank. The intake manifold may be formed by a lower half body and an upper half body, which are welded to each other by using welding margins provided in the half bodies. In this case, it is preferable that parts of each welding margin that are located to correspond to the proximal portions of the inlet pipes be wider than the remainder of the same welding margin.
    • 进气歧管包括缓冲罐和从缓冲罐延伸的多个入口管。 在入口管中,相邻一对入口管的近端部分例如通过与板状连接部分连接而被一体化。 两个相邻入口管的近端部分通过加强筋与缓冲罐的侧壁成一体。 加强筋例如从缓冲罐的连接部分延伸到侧壁。 进气歧管可以由下半体和上半体形成,它们通过设置在半体中的焊接边缘彼此焊接。 在这种情况下,优选地,对应于入口管的近端部分的每个焊接边缘的部分比相同焊接余量的其余部分宽。
    • 3. 发明申请
    • DECODER CIRCUIT, DECODING METHOD, OUTPUT CIRCUIT, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC INSTRUMENT
    • 解码器电路,解码方法,输出电路,电光设备和电子仪器
    • US20090212820A1
    • 2009-08-27
    • US12389938
    • 2009-02-20
    • Yuichi TORIUMIMotoaki NISHIMURATakeshi NOMURA
    • Yuichi TORIUMIMotoaki NISHIMURATakeshi NOMURA
    • G11C8/10
    • G11C8/10
    • A decoder circuit comprises: first decoder section that decodes an m-bit address signal portion of an (m+n)-bit address signal; and a second decoder section that decodes an n-bit address signal portion of the (m+n)-bit address signal, the first decoder section including a first AND operation circuit section that outputs signals that indicate a decoding result of the m-bit address signal portion, and a second AND operation circuit section that outputs signals that indicate a decoding result of part of the m-bit address signal portion, and the second decoder section including a third AND operation circuit section that outputs signals that indicate a decoding result of the n-bit address signal portion, and a fourth AND operation circuit section that outputs signals that indicate a decoding result of part of the n-bit address signal portion.
    • 解码器电路包括:对(m + n)位地址信号的m位地址信号部分进行解码的第一解码器部分; 以及第二解码器部分,其对(m + n)位地址信号的n位地址信号部分进行解码,第一解码器部分包括第一AND运算电路部分,其输出指示m位解码结果的信号 地址信号部分,以及输出指示m位地址信号部分的一部分的解码结果的信号的第二AND运算电路部分,第二解码器部分包括输出指示解码结果的信号的第三AND运算电路部分 以及输出指示n位地址信号部分的一部分的解码结果的信号的第四AND运算电路部。
    • 4. 发明申请
    • DRIVING CIRCUIT, ELECTRO-OPTIC DEVICE, AND ELECTRONIC DEVICE
    • 驱动电路,电光设备和电子设备
    • US20070063949A1
    • 2007-03-22
    • US11531802
    • 2006-09-14
    • Takeshi NOMURA
    • Takeshi NOMURA
    • G09G3/36
    • G09G3/3696G09G3/3614G09G3/3688G09G2310/027G09G2320/0673G09G2330/021
    • A driving circuit that drives a data line of an electro-optic device includes: a plurality of grayscale signal lines supplied with grayscale voltages, respectively; a voltage-selecting circuit that selects one grayscale voltage from the plurality of grayscale voltages supplied to the plurality of grayscale signal lines; an operational amplifier that drives, based on the grayscale voltage selected by the voltage-selecting circuit, an output line connected to the data line; and first and second resistance circuits that generate a plurality of grayscale voltages obtained by dividing a voltage between a high potential-side power source and a low potential-side power source. The first resistance circuit has a total resistance value smaller than a total resistance value of the second resistance circuit. Each of the plurality of grayscale voltages divided by the first resistance circuit is supplied, during a first period, to each of the grayscale signal lines. Each of the plurality of grayscale voltages divided by the second resistance circuit is supplied, during a second period after the first period, to each of the grayscale signal lines and the operational amplifier drives the output line based on the grayscale voltage selected from the plurality of grayscale voltages.
    • 驱动电光装置的数据线的驱动电路包括:分别提供灰度电压的多个灰阶信号线; 电压选择电路,从提供给多个灰阶信号线的多个灰度电压中选择一个灰度电压; 运算放大器,其基于由所述电压选择电路选择的灰度电压驱动连接到所述数据线的输出线; 以及产生通过高电位侧电源和低电位侧电源之间的电压分压而获得的多个灰度电压的第一和第二电阻电路。 第一电阻电路的总电阻值小于第二电阻电路的总电阻值。 在第一时段期间,由第一电阻电路分压的多个灰度级电压中的每一个被提供给每个灰阶信号线。 由第二电阻电路分压的多个灰阶电压中的每一个在第一周期之后的第二周期期间被提供给每个灰阶信号线,并且运算放大器基于从多个灰度信号中选择的灰度电压来驱动输出线 灰度电压。