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    • 4. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF
    • 半导体存储器件及其写入方法
    • US20110235395A1
    • 2011-09-29
    • US13043923
    • 2011-03-09
    • Shigeki KOBAYASHIKazuhiko Yamamoto
    • Shigeki KOBAYASHIKazuhiko Yamamoto
    • G11C11/34
    • G11C16/0466G11C16/10G11C16/3418
    • A memory cell array includes memory transistors each including a gate insulating film formed on a semiconductor substrate, a gate electrode formed on the gate insulating film, and a variable resistance film formed on the gate electrode and made of a variable resistance material having variable resistance and is configured by plural memory strings disposed with longer direction extending in a first direction and including plural series-connected memory transistors. Word lines are disposed with a longer direction extending in a second direction orthogonal to the first direction, and connected commonly to the gate electrodes of the plural memory transistors lined up in the second direction. A plate line is disposed to sandwich the variable resistance film with the gate electrode. First voltage terminals supply a certain voltage to first ends of the plural memory strings. Second voltage terminals supply a certain voltage to second ends of the plural memory strings.
    • 存储单元阵列包括存储晶体管,每个存储晶体管包括形成在半导体衬底上的栅极绝缘膜,形成在栅极绝缘膜上的栅电极和形成在栅极上的可变电阻膜,并且由可变电阻材料制成, 由沿着第一方向延伸的包括多个串联存储晶体管的长方向布置的多个存储器串构成。 字线沿着与第一方向正交的第二方向延伸的较长方向布置,并且共同连接到沿第二方向排列的多个存储晶体管的栅电极。 设置板线以与栅电极夹住可变电阻膜。 第一电压端子向多个存储器串的第一端提供一定电压。 第二电压端子向多个存储器串的第二端提供一定电压。