专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06750100B2 Nano-meter memory device and method of making the same 失效
标题翻译：纳米仪记忆体装置及其制作方法
公开(公告)号：US06750100B2
公开(公告)日：2004-06-15
申请号：US09940312
申请日：2001-08-27
申请人： Sheng Teng Hsu , Tomoya Baba , Tetsuya Ohnishi
发明人： Sheng Teng Hsu , Tomoya Baba , Tetsuya Ohnishi
IPC分类号： H01L218247
CPC分类号： H01L27/115 , H01L21/0337 , H01L27/11521 , Y10S438/947
摘要： A method of forming a memory device includes preparing a substrate having predefined characteristics; forming a first layer set on the substrate, including: building a first forming layer, having first form segments, on the substrate; building placeholder sidewalls on the first form segments wherein the sidewalls have a thickness of between about one nm and 100 nm; building a second forming layer, having second form segments, on the substrate between the placeholder sidewalls; removing the placeholder sidewalls forming vacated areas; and building active devices in the vacated areas.
摘要翻译：形成存储器件的方法包括制备具有预定特性的衬底; 在所述基板上形成第一层，所述第一层包括：在所述基板上构建具有第一成形段的第一形成层; 在所述第一形式段上建立占位符侧壁，其中所述侧壁具有在约1nm至100nm之间的厚度; 在占位符侧壁之间的衬底上建立具有第二形式段的第二形成层; 移除形成空置区域的占位符侧壁; 并在空置地区建设有源设备。

2. 发明授权

US5426063A Method of making a field effect transistor with submicron channel length and threshold implant using oblique implantation 失效
标题翻译：制造具有亚微米沟道长度的场效应晶体管和使用倾斜植入的阈值植入的方法
公开(公告)号：US5426063A
公开(公告)日：1995-06-20
申请号：US215604
申请日：1994-03-22
申请人： Seiji Kaneko , Tomoya Baba
发明人： Seiji Kaneko , Tomoya Baba
IPC分类号： H01L21/265 , H01L21/336 , H01L29/10 , H01L29/78
CPC分类号： H01L29/6659 , H01L21/26586 , H01L29/1045 , H01L29/1083 , H01L29/7833
摘要： A method for manufacturing a semiconductor device including steps of forming a gate oxide film and a gate electrode on a semiconductor substrate; implanting impurity ions of the same conductivity as the substrate in an oblique direction at a first tilt angle to the normal line of the substrate and with a first acceleration voltage and dose, while rotating the substrate about the normal line thereof; implanting impurities of the same conductivity as the substrate in the same manner except for using a tilt angle to the normal line which is greater and a dose is smaller than that of the first tilt angle and dose; and forming source and drain regions by implanting impurity ions of the opposite conductivity to the substrate into the substrate, followed by performing a thermal treatment.
摘要翻译：一种半导体器件的制造方法，包括在半导体衬底上形成栅极氧化膜和栅电极的步骤; 在基板绕其基准线旋转的同时，以与第一加速电压和第一加速度电压和剂量相对于基板的法线以第一倾斜角倾斜方向注入与基板相同导电性的杂质离子; 以相同的方式注入与衬底相同导电性的杂质，除了使用比法线更大的剂量并且剂量小于第一倾斜角度和剂量的法线的倾斜角; 以及通过将相反导电性的杂质离子注入到衬底中形成源区和漏区，然后进行热处理。

3. 发明授权

US06852604B2 Manufacturing method of semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US06852604B2
公开(公告)日：2005-02-08
申请号：US10425619
申请日：2003-04-30
申请人： Tomoya Baba
发明人： Tomoya Baba
IPC分类号： H01L21/76 , H01L21/20 , H01L21/205 , H01L21/265 , H01L21/762 , H01L29/78 , H01L21/331
CPC分类号： H01L21/76243 , H01L21/76264 , H01L21/76267 , H01L21/76283
摘要： A manufacturing method of a semiconductor substrate comprising the steps of: (a) forming a SiGe layer on a substrate of which the surface is made of silicon; (b) further forming a semiconductor layer on the SiGe layer; and (c) implanting ions into regions of the SiGe layer in the substrate that become element isolation formation regions, and carrying out a heat treatment.
摘要翻译：一种半导体衬底的制造方法，包括以下步骤：（a）在其表面由硅制成的衬底上形成SiGe层; （b）在SiGe层上进一步形成半导体层; 和（c）将离子注入到成为元件隔离形成区域的衬底中的SiGe层的区域中，并进行热处理。

4. 发明授权

US06774409B2 Semiconductor device with NMOS including Si:C channel region and/or PMOS including SiGe channel region 失效
标题翻译：具有NMOS的半导体器件包括Si：C沟道区和/或包括SiGe沟道区的PMOS
公开(公告)号：US06774409B2
公开(公告)日：2004-08-10
申请号：US10092729
申请日：2002-03-08
申请人： Tomoya Baba , Katsumasa Fujii , Akiyoshi Mutou
发明人： Tomoya Baba , Katsumasa Fujii , Akiyoshi Mutou
IPC分类号： H01L218234
CPC分类号： H01L21/823807 , H01L27/0922 , H01L29/1054
摘要： A semiconductor device comprises: a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed in this order and a gate electrode on the semiconductor substrate with intervention of a gate oxide film, wherein a channel region of the semiconductor device the is formed in the carbon-containing silicon film or wherein a channel region of the semiconductor device is formed in the silicon germanium film.
摘要翻译：半导体器件包括：半导体衬底，其上依次形成硅锗膜，含碳硅膜和硅膜，并且在半导体衬底上形成栅电极，其中介入了栅氧化膜，其中沟道区的半导体器件形成在含碳硅膜中，或者其中半导体器件的沟道区形成在硅锗膜中。

5. 发明授权

US07348186B2 Method for improving a semiconductor substrate having SiGe film and semiconductor device manufactured by using this method 失效
标题翻译：用于改善具有SiGe膜的半导体衬底和使用该方法制造的半导体器件的方法
公开(公告)号：US07348186B2
公开(公告)日：2008-03-25
申请号：US10639647
申请日：2003-08-13
申请人： Akira Yoshida , Tomoya Baba
发明人： Akira Yoshida , Tomoya Baba
IPC分类号： H01L21/66
CPC分类号： H01L29/1054 , H01L21/26506
摘要： A method of improving a semiconductor substrate including a SiGe film on a Si or SOI substrate is provided. The method includes determining a relationship between a film condition of the SiGe film and a hydrogen ion implantation condition used in making the SiGe film so as to achieve relaxation of lattice distortion in the SiGe film as well as improved crystallinity and/or surface condition of the SiGe film, so that improved conditions for improving quality of the SiGe film on the Si or SOI substrate can be determined.
摘要翻译：提供了一种在Si或SOI衬底上改善包括SiGe膜的半导体衬底的方法。该方法包括确定SiGe膜的膜状态与制造SiGe膜所用的氢离子注入条件之间的关系，以便实现SiGe膜中的晶格畸变的松弛以及改善的SiGe膜的结晶度和/或表面状态 SiGe膜，因此可以确定用于提高Si或SOI衬底上的SiGe膜的质量的改善条件。

6. 发明授权

US5532508A Semiconductor device with LDD structure 失效
标题翻译：具LDD结构的半导体器件
公开(公告)号：US5532508A
公开(公告)日：1996-07-02
申请号：US445018
申请日：1995-05-22
申请人： Seiji Kaneko , Tomoya Baba
发明人： Seiji Kaneko , Tomoya Baba
IPC分类号： H01L21/265 , H01L21/336 , H01L29/10 , H01L29/78 , H01L29/76 , H01L29/94
CPC分类号： H01L29/6659 , H01L21/26586 , H01L29/1045 , H01L29/1083 , H01L29/7833
摘要： A method for manufacturing a semiconductor device including steps of forming a gate oxide film and a gate electrode on a semiconductor substrate; implanting impurity ions of the same conductivity as the substrate in an oblique direction at a first tilt angle to the normal line of the substrate and with a first acceleration voltage and dose, while rotating the substrate about the normal line thereof; implanting impurities of the same conductivity as the substrate in the same manner except for using a tilt angle to the normal line which is greater and a dose which is smaller than that of the first tilt angle and dose; and forming source and drain regions by implanting impurity ions of the opposite conductivity to the substrate into the substrate, followed by performing a thermal treatment.
摘要翻译：一种半导体器件的制造方法，包括在半导体衬底上形成栅极氧化膜和栅电极的步骤; 在基板绕其基准线旋转的同时，以与第一加速电压和第一加速度电压和剂量相对于基板的法线以第一倾斜角倾斜方向注入与基板相同导电性的杂质离子; 以相同的方式注入与衬底相同的导电性的杂质，除了使用比法线更大的倾斜角和小于第一倾斜角度和剂量的剂量的剂量; 以及通过将相反导电性的杂质离子注入到衬底中形成源区和漏区，然后进行热处理。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式