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1. 发明授权

US08578253B2 Systems and methods for updating detector parameters in a data processing circuit 有权
标题翻译：用于更新数据处理电路中检测器参数的系统和方法
公开(公告)号：US08578253B2
公开(公告)日：2013-11-05
申请号：US12651956
申请日：2010-01-04
申请人： Shaohua Yang , Jonseung Park , Changyou Xu , Madhusudan Kalluri , Yuan Xing Lee , Kapil Gaba
发明人： Shaohua Yang , Jonseung Park , Changyou Xu , Madhusudan Kalluri , Yuan Xing Lee , Kapil Gaba
IPC分类号： H03M13/00
CPC分类号： H03M13/1111 , G11B2220/2516 , H03M13/3723
摘要： Various embodiments of the present invention provide systems and methods for updating detector parameters in a data processing circuit. For example, a data processing circuit is disclosed that includes a first detector circuit, a second detector circuit, and a calibration circuit. The first detector circuit is operable to receive a first data set and to apply a data detection algorithm to the first data set, and the second detector circuit is operable to receive a second data set and to apply the data detection algorithm to the second data set. The calibration circuit is operable to calculate a data detection parameter based upon a third data set. The data detection parameter is used by the first detector circuit in applying the data detection algorithm to the first data set during a period that the data detection parameter is used by the second detector circuit in applying the data detection algorithm to the second data set.
摘要翻译：本发明的各种实施例提供用于在数据处理电路中更新检测器参数的系统和方法。例如，公开了一种包括第一检测器电路，第二检测器电路和校准电路的数据处理电路。第一检测器电路可操作以接收第一数据集并将数据检测算法应用于第一数据集，并且第二检测器电路可操作以接收第二数据集并将数据检测算法应用于第二数据集。校准电路可操作以基于第三数据集计算数据检测参数。数据检测参数由第一检测器电路在将数据检测算法应用于第二数据集时由第二检测器电路使用的时段期间将数据检测算法应用于第一数据集使用。

2. 发明申请

US20110167227A1 Systems and Methods for Updating Detector Parameters in a Data Processing Circuit 有权
标题翻译：用于更新数据处理电路中检测器参数的系统和方法
公开(公告)号：US20110167227A1
公开(公告)日：2011-07-07
申请号：US12651956
申请日：2010-01-04
申请人： Shaohua Yang , Jonseung Park , Changyou Xu , Madhusudan Kalluri , Yuan Xing Lee , Kapil Gaba
发明人： Shaohua Yang , Jonseung Park , Changyou Xu , Madhusudan Kalluri , Yuan Xing Lee , Kapil Gaba
IPC分类号： G06F12/00 , G06F11/28
CPC分类号： H03M13/1111 , G11B2220/2516 , H03M13/3723
摘要： Various embodiments of the present invention provide systems and methods for updating detector parameters in a data processing circuit. For example, a data processing circuit is disclosed that includes a first detector circuit, a second detector circuit, and a calibration circuit. The first detector circuit is operable to receive a first data set and to apply a data detection algorithm to the first data set, and the second detector circuit is operable to receive a second data set and to apply the data detection algorithm to the second data set. The calibration circuit is operable to calculate a data detection parameter based upon a third data set. The data detection parameter is used by the first detector circuit in applying the data detection algorithm to the first data set during a period that the data detection parameter is used by the second detector circuit in applying the data detection algorithm to the second data set.
摘要翻译：本发明的各种实施例提供用于在数据处理电路中更新检测器参数的系统和方法。例如，公开了一种包括第一检测器电路，第二检测器电路和校准电路的数据处理电路。第一检测器电路可操作以接收第一数据集并将数据检测算法应用于第一数据集，并且第二检测器电路可操作以接收第二数据集并将数据检测算法应用于第二数据集。校准电路可操作以基于第三数据集计算数据检测参数。数据检测参数由第一检测器电路在将数据检测算法应用于第二数据集时由第二检测器电路使用的时段期间将数据检测算法应用于第一数据集使用。

3. 发明授权

US08250434B2 Systems and methods for codec usage control during storage pre-read 有权
标题翻译：存储预读过程中编解码器使用控制的系统和方法
公开(公告)号：US08250434B2
公开(公告)日：2012-08-21
申请号：US12487638
申请日：2009-06-18
申请人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
发明人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
IPC分类号： H03M13/00
CPC分类号： G11B20/10527 , G11B20/10194 , G11B2020/10694 , G11B2020/10805 , G11B2220/2516 , H03M13/1102 , H03M13/2957 , H03M13/6343
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes an increased iteration enable signal, a first detector circuit, a second detector circuit, and a data decoding circuit. The first detector circuit receives a data set and performs a data detection on the data set to provide a detected data set. The data decoding circuit receives a derivative of the detected data set and performs a decoding process to provide a decoded data set. The decoded data set is provided to the second detector circuit based at least in part on an assertion level of the increased iteration enable signal.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种数据处理电路，其包括增加的迭代使能信号，第一检测器电路，第二检测器电路和数据解码电路。第一检测器电路接收数据组并对数据集执行数据检测以提供检测数据集。数据解码电路接收检测数据组的导数，并进行解码处理，提供解码数据组。解码数据集至少部分地基于增加的迭代使能信号的断言电平被提供给第二检测器电路。

4. 发明申请

US20100322048A1 Systems and Methods for Codec Usage Control During Storage Pre-read 有权
标题翻译：存储预读期间编码器使用控制的系统和方法
公开(公告)号：US20100322048A1
公开(公告)日：2010-12-23
申请号：US12487638
申请日：2009-06-18
申请人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
发明人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
IPC分类号： G11B20/00
CPC分类号： G11B20/10527 , G11B20/10194 , G11B2020/10694 , G11B2020/10805 , G11B2220/2516 , H03M13/1102 , H03M13/2957 , H03M13/6343
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes an increased iteration enable signal, a first detector circuit, a second detector circuit, and a data decoding circuit. The first detector circuit receives a data set and performs a data detection on the data set to provide a detected data set. The data decoding circuit receives a derivative of the detected data set and performs a decoding process to provide a decoded data set. The decoded data set is provided to the second detector circuit based at least in part on an assertion level of the increased iteration enable signal.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种数据处理电路，其包括增加的迭代使能信号，第一检测器电路，第二检测器电路和数据解码电路。第一检测器电路接收数据组并对数据集执行数据检测以提供检测数据集。数据解码电路接收检测数据组的导数，并进行解码处理，提供解码数据组。解码数据集至少部分地基于增加的迭代使能信号的断言电平被提供给第二检测器电路。

5. 发明授权

US08799340B2 Systems and methods for efficient data channel testing 有权
标题翻译：高效数据通道测试的系统和方法
公开(公告)号：US08799340B2
公开(公告)日：2014-08-05
申请号：US13280023
申请日：2011-10-24
申请人： Changyou Xu , Shaohua Yang , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Kapil Gaba
IPC分类号： G06F1/02 , G11B27/36
CPC分类号： G06F7/582
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes: a data detector circuit, a pseudo-random sequence generator circuit, a decoder circuit, and a pseudo-random sequence reconstitution circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a detected output. The pseudo-random sequence generator circuit is operable to generate an interim data sequence and to generate a second data set based upon a combination of the detected output and the interim data sequence. The decoder circuit is operable to apply a data decode algorithm to a derivative of the second data set to yield a third data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种数据处理系统，其包括：数据检测器电路，伪随机序列发生器电路，解码器电路和伪随机序列重构电路。数据检测器电路可操作以将数据检测算法应用于第一数据集以产生检测到的输出。伪随机序列发生器电路可操作以产生临时数据序列，并且基于检测到的输出和中间数据序列的组合来生成第二数据集。解码器电路可操作以将数据解码算法应用于第二数据集的导数以产生第三数据集。

6. 发明授权

US08446683B2 Systems and methods for data pre-coding calibration 有权
标题翻译：用于数据预编码校准的系统和方法
公开(公告)号：US08446683B2
公开(公告)日：2013-05-21
申请号：US13031818
申请日：2011-02-22
申请人： Changyou Xu , Shaohua Yang , Haitoa Xia , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Haitoa Xia , Kapil Gaba
IPC分类号： G11B5/00
CPC分类号： G11B20/10083 , G11B20/10296 , G11B20/1833 , G11B2020/185 , G11B2220/2516 , G11B2220/415
摘要： Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.
摘要翻译：本发明的各种实施例提供了用于在预编码和非预编码之间进行选择的系统和方法。作为示例，公开了一种数据处理电路，其包括：第一数据检测器电路，第二数据检测器电路，第一比较器电路，第二比较器电路和预代码选择电路。第一数据检测器电路可选择地被配置为以预编码状态操作，并且可操作以将数据检测算法应用于数据输入以产生第一检测输出。第二数据检测器电路可操作以将数据检测算法应用于数据输入以产生第二检测输出而不补偿预编码。第一比较器电路可操作以将第一检测输出与已知输入进行比较以产生第一比较值，并且第二比较器电路可操作以将第二检测输出与已知输入进行比较以产生第二比较值。预编码选择电路可操作以至少部分地基于第一比较值和第二比较值来确定第一数据检测器电路的可选配置。

7. 发明申请

US20110161633A1 Systems and Methods for Monitoring Out of Order Data Decoding 有权
标题翻译：监控异步数据解码的系统和方法
公开(公告)号：US20110161633A1
公开(公告)日：2011-06-30
申请号：US12651254
申请日：2009-12-31
申请人： Changyou Xu , Shaohua Yang , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Kapil Gaba
IPC分类号： G06F9/30 , G06F12/00
CPC分类号： G06F11/3093 , G06F11/3034 , G06F11/3055 , G06F11/3068
摘要： Various embodiments of the present invention provide systems and methods for monitoring out of order data decoding. For example, a method for monitoring out of order data processing is provided that includes receiving a plurality of data sets that is associated with a plurality of identifiers with each of the plurality of identifiers indicates a respective one of the plurality of data sets; storing each of the plurality of identifiers in a FIFO memory in an order that the corresponding data sets of the plurality of data sets was received; processing the plurality of data sets such that at least one of the plurality of data sets is provided as an output data set; accessing the next available identifier from the FIFO memory; and asserting an out of order signal when the next available identifier is not the same as the identifier associated with the output data set.
摘要翻译：本发明的各种实施例提供用于监视异步数据解码的系统和方法。例如，提供了一种用于监视不合格数据处理的方法，包括接收与多个标识符相关联的多个数据集，所述多个标识符中的每一个标识符指示所述多个数据集中的相应一个; 将多个标识符中的每一个按照接收到多个数据集的相应数据集的顺序存储在FIFO存储器中; 处理所述多个数据集，使得所述多个数据集中的至少一个被提供为输出数据集; 从FIFO存储器访问下一个可用标识符; 并且当下一个可用标识符与与输出数据集相关联的标识符不相同时，断言无序信号。

8. 发明授权

US08688873B2 Systems and methods for monitoring out of order data decoding 有权
标题翻译：用于监视无序数据解码的系统和方法
公开(公告)号：US08688873B2
公开(公告)日：2014-04-01
申请号：US12651254
申请日：2009-12-31
申请人： Changyou Xu , Shaohua Yang , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Kapil Gaba
IPC分类号： G06F3/00 , G06F5/00
CPC分类号： G06F11/3093 , G06F11/3034 , G06F11/3055 , G06F11/3068
摘要： Various embodiments of the present invention provide systems and methods for monitoring out of order data decoding. For example, a method for monitoring out of order data processing is provided that includes receiving a plurality of data sets that is associated with a plurality of identifiers with each of the plurality of identifiers indicates a respective one of the plurality of data sets; storing each of the plurality of identifiers in a FIFO memory in an order that the corresponding data sets of the plurality of data sets was received; processing the plurality of data sets such that at least one of the plurality of data sets is provided as an output data set; accessing the next available identifier from the FIFO memory; and asserting an out of order signal when the next available identifier is not the same as the identifier associated with the output data set.
摘要翻译：本发明的各种实施例提供用于监视异步数据解码的系统和方法。例如，提供了一种用于监视不合格数据处理的方法，包括接收与多个标识符相关联的多个数据集，所述多个标识符中的每一个标识符指示所述多个数据集中的相应一个; 将多个标识符中的每一个按照接收到多个数据集的相应数据集的顺序存储在FIFO存储器中; 处理所述多个数据集，使得所述多个数据集中的至少一个被提供为输出数据集; 从FIFO存储器访问下一个可用标识符; 并且当下一个可用标识符与与输出数据集相关联的标识符不相同时，断言无序信号。

9. 发明申请

US20130103731A1 Systems and Methods for Efficient Data Channel Testing 有权
标题翻译：高效数据通道测试的系统和方法
公开(公告)号：US20130103731A1
公开(公告)日：2013-04-25
申请号：US13280023
申请日：2011-10-24
申请人： Changyou Xu , Shaohua Yang , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Kapil Gaba
IPC分类号： G06F7/58
CPC分类号： G06F7/582
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes: a data detector circuit, a pseudo-random sequence generator circuit, a decoder circuit, and a pseudo-random sequence reconstitution circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a detected output. The pseudo-random sequence generator circuit is operable to generate an interim data sequence and to generate a second data set based upon a combination of the detected output and the interim data sequence. The decoder circuit is operable to apply a data decode algorithm to a derivative of the second data set to yield a third data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种数据处理系统，其包括：数据检测器电路，伪随机序列发生器电路，解码器电路和伪随机序列重构电路。数据检测器电路可操作以将数据检测算法应用于第一数据集以产生检测到的输出。伪随机序列发生器电路可操作以产生临时数据序列，并且基于检测到的输出和中间数据序列的组合来生成第二数据集。解码器电路可操作以将数据解码算法应用于第二数据集的导数以产生第三数据集。

10. 发明申请

US20120212849A1 Systems and Methods for Data Pre-Coding Calibration 有权
标题翻译：数据预编码校准系统与方法
公开(公告)号：US20120212849A1
公开(公告)日：2012-08-23
申请号：US13031818
申请日：2011-02-22
申请人： Changyou Xu , Shaohua Yang , Haitao Xia , Kapil Gaba
发明人： Changyou Xu , Shaohua Yang , Haitao Xia , Kapil Gaba
IPC分类号： G11B5/00 , H04L27/01
CPC分类号： G11B20/10083 , G11B20/10296 , G11B20/1833 , G11B2020/185 , G11B2220/2516 , G11B2220/415
摘要： Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value.
摘要翻译：本发明的各种实施例提供了用于在预编码和非预编码之间进行选择的系统和方法。作为示例，公开了一种数据处理电路，其包括：第一数据检测器电路，第二数据检测器电路，第一比较器电路，第二比较器电路和预代码选择电路。第一数据检测器电路可选择地被配置为以预编码状态操作，并且可操作以将数据检测算法应用于数据输入以产生第一检测输出。第二数据检测器电路可操作以将数据检测算法应用于数据输入以产生第二检测输出而不补偿预编码。第一比较器电路可操作以将第一检测输出与已知输入进行比较以产生第一比较值，并且第二比较器电路可操作以将第二检测输出与已知输入进行比较以产生第二比较值。预编码选择电路可操作以至少部分地基于第一比较值和第二比较值来确定第一数据检测器电路的可选配置。

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