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1. 发明授权

US08243100B2 System and method to perform fast rotation operations 有权
标题翻译：执行快速旋转操作的系统和方法
公开(公告)号：US08243100B2
公开(公告)日：2012-08-14
申请号：US12146825
申请日：2008-06-26
申请人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng , Remi Jonathan Gurski
发明人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng , Remi Jonathan Gurski
IPC分类号： G09G5/00
CPC分类号： G06F9/30032 , G06F7/48 , G06F7/49921 , G06F7/768
摘要： Systems and methods to perform fast rotation operations are disclosed. In a particular embodiment, a method includes executing a single instruction. The method includes receiving first data indicating a first coordinate and a second coordinate, receiving a first control value that indicates a first rotation value selected from a set of ninety degree multiples, and writing output data corresponding to the first data rotated by the first rotation value.
摘要翻译：公开了执行快速旋转操作的系统和方法。在特定实施例中，一种方法包括执行单个指令。所述方法包括：接收指示第一坐标和第二坐标的第一数据，接收指示从九十度倍数的集合中选择的第一旋转值的第一控制值，以及写入与第一旋转值旋转的第一数据相对应的输出数据。

2. 发明申请

US20090327667A1 System and Method to Perform Fast Rotation Operations 有权
标题翻译：执行快速旋转操作的系统和方法
公开(公告)号：US20090327667A1
公开(公告)日：2009-12-31
申请号：US12146825
申请日：2008-06-26
申请人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng , Remi Jonathan Gurski
发明人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng , Remi Jonathan Gurski
IPC分类号： G06F9/315
CPC分类号： G06F9/30032 , G06F7/48 , G06F7/49921 , G06F7/768
摘要： Systems and methods to perform fast rotation operations are disclosed. In a particular embodiment, a method includes executing a single instruction. The method includes receiving first data indicating a first coordinate and a second coordinate, receiving a first control value that indicates a first rotation value selected from a set of ninety degree multiples, and writing output data corresponding to the first data rotated by the first rotation value.
摘要翻译：公开了执行快速旋转操作的系统和方法。在特定实施例中，一种方法包括执行单个指令。所述方法包括：接收指示第一坐标和第二坐标的第一数据，接收指示从九十度倍数的集合中选择的第一旋转值的第一控制值，以及写入与第一旋转值旋转的第一数据相对应的输出数据。

3. 发明申请

US20090132783A1 System and Method of Determining an Address of an Element Within a Table 有权
标题翻译：确定表内元素地址的系统和方法
公开(公告)号：US20090132783A1
公开(公告)日：2009-05-21
申请号：US11943265
申请日：2007-11-20
申请人： Shankar Krithivasan , Lucian Codrescu , Erich James Plondke , Mao Zeng
发明人： Shankar Krithivasan , Lucian Codrescu , Erich James Plondke , Mao Zeng
IPC分类号： G06F12/10
CPC分类号： G06F9/3555 , G06F9/30018 , G06F9/30032 , G06F9/3004
摘要： In a particular embodiment, a method is disclosed that includes executing a single instruction to identify a location within a table stored at a memory. The single instruction is executable by a processor to extract bit field data from a first register and insert the bit field data into an index portion of a second register. The second register includes a table address portion and an index portion. The table address portion includes a table address identifying a memory location associated with a table. The table address and the bit field data combine to form an indexed address to an element within the table.
摘要翻译：在特定实施例中，公开了一种方法，其包括执行单个指令以识别存储在存储器中的表中的位置。单个指令可由处理器执行以从第一寄存器提取位字段数据，并将位字段数据插入第二寄存器的索引部分。第二寄存器包括表地址部分和索引部分。表地址部分包括标识与表相关联的存储器位置的表地址。表地址和位字段数据组合起来，形成一个索引地址给表中的一个元素。

4. 发明授权

US07877571B2 System and method of determining an address of an element within a table 有权
标题翻译：确定表中元素的地址的系统和方法
公开(公告)号：US07877571B2
公开(公告)日：2011-01-25
申请号：US11943265
申请日：2007-11-20
申请人： Shankar Krithivasan , Lucian Codrescu , Erich James Plondke , Mao Zeng
发明人： Shankar Krithivasan , Lucian Codrescu , Erich James Plondke , Mao Zeng
IPC分类号： G06F12/00
CPC分类号： G06F9/3555 , G06F9/30018 , G06F9/30032 , G06F9/3004
摘要： In a particular embodiment, a method is disclosed that includes executing a single instruction to identify a location within a table stored at a memory. The single instruction is executable by a processor to extract bit field data from a first register and insert the bit field data into an index portion of a second register. The second register includes a table address portion and an index portion. The table address portion includes a table address identifying a memory location associated with a table. The table address and the bit field data combine to form an indexed address to an element within the table.
摘要翻译：在特定实施例中，公开了一种方法，其包括执行单个指令以识别存储在存储器中的表中的位置。单个指令可由处理器执行以从第一寄存器提取位字段数据，并将位字段数据插入第二寄存器的索引部分。第二寄存器包括表地址部分和索引部分。表地址部分包括标识与表相关联的存储器位置的表地址。表地址和位字段数据组合起来，形成一个索引地址给表中的一个元素。

5. 发明申请

US20090177724A1 Processor and Method of Determining a Normalization Count 失效
标题翻译：确定规范化计数的处理器和方法
公开(公告)号：US20090177724A1
公开(公告)日：2009-07-09
申请号：US11971230
申请日：2008-01-09
申请人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng
发明人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng
IPC分类号： G06F5/01
CPC分类号： G06F7/74 , G06F7/49936
摘要： In a particular embodiment, a method is disclosed that includes receiving an operand to be normalized at a normalization logic circuit, where the operand includes a plurality of bits. The method further includes generating a zero output when a value of the operand is equal to zero and, when the value is not equal to zero, generating an output value representing a number that is one less than a count of leading bits of the operand.
摘要翻译：在特定实施例中，公开了一种方法，其包括接收在归一化逻辑电路中归一化的操作数，其中操作数包括多个位。该方法还包括当操作数的值等于零时产生零输出，并且当该值不等于零时，生成表示小于该操作数的前导位的计数的数字的输出值。

6. 发明授权

US08631056B2 Processor and method of determining a normalization count 失效
标题翻译：处理器和确定归一化计数的方法
公开(公告)号：US08631056B2
公开(公告)日：2014-01-14
申请号：US11971230
申请日：2008-01-09
申请人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng
发明人： Shankar Krithivasan , Erich James Plondke , Lucian Codrescu , Mao Zeng
IPC分类号： G06F7/00
CPC分类号： G06F7/74 , G06F7/49936
摘要： In a particular embodiment, a method is disclosed that includes receiving an operand to be normalized at a normalization logic circuit, where the operand includes a plurality of bits. The method further includes generating a zero output when a value of the operand is equal to zero and, when the value is not equal to zero, generating an output value representing a number that is one less than a count of leading bits of the operand.
摘要翻译：在特定实施例中，公开了一种方法，其包括接收在归一化逻辑电路中归一化的操作数，其中操作数包括多个位。该方法还包括当操作数的值等于零时产生零输出，并且当该值不等于零时，生成表示小于该操作数的前导位的计数的数字的输出值。

7. 发明授权

US08990543B2 System and method for generating and using predicates within a single instruction packet 有权
标题翻译：用于在单个指令包内生成和使用谓词的系统和方法
公开(公告)号：US08990543B2
公开(公告)日：2015-03-24
申请号：US12045825
申请日：2008-03-11
申请人： Lucian Codrescu , Robert Allan Lester , Charles Joseph Tabony , Erich James Plondke , Mao Zeng , Suresh Venkumahanti , Ajay Anant Ingle
发明人： Lucian Codrescu , Robert Allan Lester , Charles Joseph Tabony , Erich James Plondke , Mao Zeng , Suresh Venkumahanti , Ajay Anant Ingle
IPC分类号： G06F15/80 , G06F9/38 , G06F9/30
CPC分类号： G06F9/3853 , G06F9/30036 , G06F9/30069 , G06F9/3826 , G06F9/3828 , G06F9/3889
摘要： In a particular embodiment, a method is disclosed that includes receiving an instruction packet including a first instruction and a second instruction that is dependent on the first instruction at a processor having a plurality of parallel execution pipelines, including a first execution pipeline and a second execution pipeline. The method further includes executing in parallel at least a portion of the first instruction and at least a portion of the second instruction. The method also includes selectively committing a second result of executing the at least a portion of the second instruction with the second execution pipeline based on a first result related to execution of the first instruction with the first execution pipeline.
摘要翻译：在特定实施例中，公开了一种方法，其包括在具有多个并行执行流水线的处理器处接收包括依赖于第一指令的第一指令和第二指令的指令分组，所述处理器包括第一执行流水线和第二执行管道。该方法还包括并行地执行第一指令的至少一部分和第二指令的至少一部分。该方法还包括基于与第一执行流水线执行第一指令相关的第一结果，选择性地提交执行具有第二执行流水线的第二指令的至少一部分的第二结果。

8. 发明申请

US20130086360A1 FIFO Load Instruction 有权
标题翻译： FIFO加载指令
公开(公告)号：US20130086360A1
公开(公告)日：2013-04-04
申请号：US13249284
申请日：2011-09-30
申请人： Mao Zeng , Lucian Codrescu , Erich James Plondke , Ajay Anant Ingle
发明人： Mao Zeng , Lucian Codrescu , Erich James Plondke , Ajay Anant Ingle
IPC分类号： G06F9/312
CPC分类号： G06F9/3004 , G06F9/30032 , G06F9/30043
摘要： An instruction identifies a register and a memory location. Upon execution of the instruction by a processor, an item is loaded from the memory location and a shift and insert operation is performed to shift data in the register and to insert the item into the register.
摘要翻译：指令识别寄存器和存储器位置。在由处理器执行指令时，从存储器位置加载一个物品，并执行移位和插入操作以移位寄存器中的数据并将该项目插入到寄存器中。

9. 发明申请

US20090235051A1 System and Method of Selectively Committing a Result of an Executed Instruction 有权
标题翻译：选择性地执行执行指令的结果的系统和方法
公开(公告)号：US20090235051A1
公开(公告)日：2009-09-17
申请号：US12045825
申请日：2008-03-11
申请人： Lucian Codrescu , Robert Allan Lester , Charles Joseph Tabony , Erich James Plondke , Mao Zeng , Suresh Venkumahanti , Ajay Anant Ingle
发明人： Lucian Codrescu , Robert Allan Lester , Charles Joseph Tabony , Erich James Plondke , Mao Zeng , Suresh Venkumahanti , Ajay Anant Ingle
IPC分类号： G06F9/30 , G06F9/312
CPC分类号： G06F9/3853 , G06F9/30036 , G06F9/30069 , G06F9/3826 , G06F9/3828 , G06F9/3889
摘要： In a particular embodiment, a method is disclosed that includes receiving an instruction packet including a first instruction and a second instruction that is dependent on the first instruction at a processor having a plurality of parallel execution pipelines, including a first execution pipeline and a second execution pipeline. The method further includes executing in parallel at least a portion of the first instruction and at least a portion of the second instruction. The method also includes selectively committing a second result of executing the at least a portion of the second instruction with the second execution pipeline based on a first result related to execution of the first instruction with the first execution pipeline.
摘要翻译：在特定实施例中，公开了一种方法，其包括在具有多个并行执行流水线的处理器处接收包括依赖于第一指令的第一指令和第二指令的指令分组，所述处理器包括第一执行流水线和第二执行管道。该方法还包括并行地执行第一指令的至少一部分和第二指令的至少一部分。该方法还包括基于与第一执行流水线执行第一指令相关的第一结果，选择性地提交执行具有第二执行流水线的第二指令的至少一部分的第二结果。

10. 发明授权

US09147123B2 System and method to perform feature detection and to determine a feature score 有权
标题翻译：执行特征检测并确定特征得分的系统和方法
公开(公告)号：US09147123B2
公开(公告)日：2015-09-29
申请号：US13602677
申请日：2012-09-04
申请人： Mao Zeng , Erich James Plondke , Lucian Codrescu
发明人： Mao Zeng , Erich James Plondke , Lucian Codrescu
IPC分类号： G06K9/68 , G06K9/46
CPC分类号： G06K9/4638
摘要： A system and method of processing an image is disclosed. A particular method of determining whether a particular pixel of an image is a feature includes receiving data corresponding to a plurality of pixels (from the image) surrounding the particular pixel. The method further includes determining a set of comparison results, each corresponding to one of the plurality of pixels and indicating a result of comparing an attribute value corresponding to one of the plurality of pixels to a comparison value (based on a particular attribute value of the particular pixel and a threshold value). The method further includes performing a processor-executable instruction that, when executed by a processor, causes the processor to identify a subset of the set of comparison results that indicate the particular pixel is the feature. The identified subset may be a consecutive order of pixels of the plurality of pixels.
摘要翻译：公开了一种处理图像的系统和方法。确定图像的特定像素是否是特征的特定方法包括接收与围绕特定像素的多个像素（来自图像）相对应的数据。所述方法还包括确定一组比较结果，每一个对应于所述多个像素之一并且指示将与所述多个像素中的一个相对应的属性值与比较值（基于所述多个像素的特定属性值）进行比较的结果特定像素和阈值）。所述方法还包括执行处理器可执行指令，所述指令在由处理器执行时使所述处理器识别所述特定像素是所述特征的所述一组比较结果的子集。所识别的子集可以是多个像素的像素的连续顺序。

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