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1. 发明授权

US08946828B2 Semiconductor device having elevated structure and method of manufacturing the same 有权
标题翻译：具有升高的结构的半导体器件及其制造方法
公开(公告)号：US08946828B2
公开(公告)日：2015-02-03
申请号：US12702683
申请日：2010-02-09
申请人： Sey-Ping Sun , Tsung-Lin Lee , Chin-Hsiang Lin , Chih-Hao Chang , Chen-Nan Yeh , Chao-An Jong
发明人： Sey-Ping Sun , Tsung-Lin Lee , Chin-Hsiang Lin , Chih-Hao Chang , Chen-Nan Yeh , Chao-An Jong
IPC分类号： H01L29/78 , H01L21/768 , H01L29/66
CPC分类号： H01L29/4232 , H01L21/76834 , H01L21/76849 , H01L21/76897 , H01L29/495 , H01L29/4966 , H01L29/66545 , H01L29/78
摘要： A semiconductor device includes a semiconductor substrate; a gate stack overlying the substrate, a spacer formed on sidewalls of the gate stack, and a protection layer overlying the gate stack for filling at least a portion of a space surrounded by the spacer and the top surface of the gate stack. A top surface of the spacer is higher than a top surface of the gate stack.
摘要翻译：半导体器件包括半导体衬底; 覆盖衬底的栅极堆叠，形成在栅极堆叠的侧壁上的间隔物，以及覆盖栅极堆叠的保护层，用于填充由间隔物和栅极堆叠的顶表面围绕的空间的至少一部分。间隔件的顶表面高于栅极堆叠的顶表面。

2. 发明申请

US20110193144A1 SEMICONDUCTOR DEVICE HAVING ELEVATED STRUCTURE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有高度结构的半导体器件及其制造方法
公开(公告)号：US20110193144A1
公开(公告)日：2011-08-11
申请号：US12702683
申请日：2010-02-09
申请人： Sey-Ping Sun , Tsung-Lin Lee , Chin-Hsiang Lin , Chih-Hao Chang , Chen-Nan Yeh , Chao-An Jong
发明人： Sey-Ping Sun , Tsung-Lin Lee , Chin-Hsiang Lin , Chih-Hao Chang , Chen-Nan Yeh , Chao-An Jong
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L29/4232 , H01L21/76834 , H01L21/76849 , H01L21/76897 , H01L29/495 , H01L29/4966 , H01L29/66545 , H01L29/78
摘要： A semiconductor device includes a semiconductor substrate; a gate stack overlying the substrate, a spacer formed on sidewalls of the gate stack, and a protection layer overlying the gate stack for filling at least a portion of a space surrounded by the spacer and the top surface of the gate stack. A top surface of the spacer is higher than a top surface of the gate stack.
摘要翻译：半导体器件包括半导体衬底; 覆盖衬底的栅极堆叠，形成在栅极堆叠的侧壁上的间隔物，以及覆盖栅极堆叠的保护层，用于填充由间隔物和栅极堆叠的顶表面围绕的空间的至少一部分。间隔件的顶表面高于栅极堆叠的顶表面。

3. 发明授权

US08507996B2 Block contact plugs for MOS devices 有权
标题翻译：块接触器用于MOS器件
公开(公告)号：US08507996B2
公开(公告)日：2013-08-13
申请号：US12789046
申请日：2010-05-27
申请人： Sey-Ping Sun , Chih-Hao Chang , Chao-An Jong , Tsung-Lin Lee , Chung-Ju Lee , Chin-Hsiang Lin
发明人： Sey-Ping Sun , Chih-Hao Chang , Chao-An Jong , Tsung-Lin Lee , Chung-Ju Lee , Chin-Hsiang Lin
IPC分类号： H01L23/528
CPC分类号： H01L21/76897 , H01L21/76804 , H01L21/76816 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor substrate; a gate stack overlying the semiconductor substrate; a gate spacer on a sidewall of the gate stack; a first contact plug having an inner edge contacting a sidewall of the gate spacer, and a top surface level with a top surface of the gate stack; and a second contact plug over and contacting the first contact plug. The second contact plug has a cross-sectional area smaller than a cross-sectional area of the first contact plug.
摘要翻译：集成电路结构包括半导体衬底; 覆盖半导体衬底的栅极堆叠; 在栅极堆叠的侧壁上的栅极间隔物; 具有接触所述栅极隔离物的侧壁的内边缘的第一接触插塞和具有所述栅极堆叠的顶表面的顶表面水平; 以及第二接触插头，并且与第一接触插塞接触。第二接触插塞的横截面积小于第一接触插塞的横截面面积。

4. 发明申请

US20110068411A1 Block Contact Plugs for MOS Devices 有权
标题翻译： MOS器件的块式触点插头
公开(公告)号：US20110068411A1
公开(公告)日：2011-03-24
申请号：US12789046
申请日：2010-05-27
申请人： Sey-Ping Sun , Chih-Hao Chang , Chao-An Jong , Tsung-Lin Lee , Chung-Ju Lee , Chin-Hsiang Lin
发明人： Sey-Ping Sun , Chih-Hao Chang , Chao-An Jong , Tsung-Lin Lee , Chung-Ju Lee , Chin-Hsiang Lin
IPC分类号： H01L29/78
CPC分类号： H01L21/76897 , H01L21/76804 , H01L21/76816 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor substrate; a gate stack overlying the semiconductor substrate; a gate spacer on a sidewall of the gate stack; a first contact plug having an inner edge contacting a sidewall of the gate spacer, and a top surface level with a top surface of the gate stack; and a second contact plug over and contacting the first contact plug. The second contact plug has a cross-sectional area smaller than a cross-sectional area of the first contact plug.
摘要翻译：集成电路结构包括半导体衬底; 覆盖半导体衬底的栅极堆叠; 在栅极堆叠的侧壁上的栅极间隔物; 具有接触所述栅极隔离物的侧壁的内边缘的第一接触插塞和具有所述栅极堆叠的顶表面的顶表面水平; 以及第二接触插头，并且与第一接触插塞接触。第二接触插塞的横截面积小于第一接触插塞的横截面面积。

5. 发明申请

US20080290467A1 SEMICONDUCTOR MEMORY STRUCTURES 有权
标题翻译：半导体存储器结构
公开(公告)号：US20080290467A1
公开(公告)日：2008-11-27
申请号：US11752736
申请日：2007-05-23
申请人： Shau-Lin Shue , Chao-An Jong
发明人： Shau-Lin Shue , Chao-An Jong
IPC分类号： H01L29/94 , H01L29/12
CPC分类号： H01L45/144 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/16
摘要： A semiconductor structure includes a first conductive layer coupled to a transistor. A first dielectric layer is over the first conductive layer. A second conductive layer is within the first dielectric layer, contacting a portion of a top surface of the first conductive layer. The second conductive layer includes a cap portion extending above a top surface of the first dielectric layer. A first dielectric spacer is between the first dielectric layer and the second conductive layer. A phase change material layer is above a top surface of the second conductive layer. A third conductive layer is over the phase change material layer. A second dielectric layer is over the first dielectric layer. A second dielectric spacer is on a sidewall of the cap portion, wherein a thermal conductivity of the second dielectric spacer is less than that of the first dielectric layer or that of the second dielectric layer.
摘要翻译：半导体结构包括耦合到晶体管的第一导电层。第一电介质层在第一导电层之上。第二导电层在第一介电层内，与第一导电层的顶表面的一部分接触。第二导电层包括在第一介电层的顶表面上方延伸的盖部分。第一介电隔离物在第一介电层和第二导电层之间。相变材料层在第二导电层的顶表面之上。第三导电层在相变材料层之上。第二电介质层在第一介电层上。第二电介质间隔物位于帽部分的侧壁上，其中第二电介质间隔物的热导率小于第一电介质层或第二电介质层的热导率。

6. 发明申请

US20140008799A1 METHOD FOR FABRICATING METAL LINE AND DEVICE WITH METAL LINE 审中-公开
标题翻译：用金属线制造金属线和器件的方法
公开(公告)号：US20140008799A1
公开(公告)日：2014-01-09
申请号：US13541672
申请日：2012-07-04
申请人： Chao-An Jong , Fu-Liang Yang
发明人： Chao-An Jong , Fu-Liang Yang
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/53266 , H01L21/76831 , H01L21/76834 , H01L21/76852 , H01L21/76867 , H01L21/76885 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： A metal line fabricating method includes the following steps. Firstly, a substrate is provided. Then, a first barrier layer is formed over the substrate. A first dielectric layer is formed over the first barrier layer. An opening is formed in the first dielectric layer, wherein the opening runs through the first dielectric layer, so that the first barrier layer is exposed to the opening. A metal deposition process is performed to form a metal line over the exposed first barrier layer at a bottom of the opening. The first dielectric layer and the first barrier layer underlying the first dielectric layer are removed, but the metal line and the first barrier layer underlying the metal line are remained. Afterwards, a second dielectric layer is formed over the substrate which is provided with the metal line and the first barrier layer.
摘要翻译：金属线制造方法包括以下步骤。首先，提供基板。然后，在衬底上形成第一阻挡层。第一介电层形成在第一阻挡层上。在第一电介质层中形成开口，其中开口穿过第一介电层，使得第一阻挡层暴露于开口。执行金属沉积工艺以在开口底部的暴露的第一阻挡层上形成金属线。除去第一电介质层和第一介电层下面的第一阻挡层，但保留金属线和金属线下方的第一阻挡层。之后，在设置有金属线和第一阻挡层的基板的上方形成第二电介质层。

7. 发明授权

US07888719B2 Semiconductor memory structures 有权
标题翻译：半导体存储器结构
公开(公告)号：US07888719B2
公开(公告)日：2011-02-15
申请号：US11752736
申请日：2007-05-23
申请人： Shau-Lin Shue , Chao-An Jong
发明人： Shau-Lin Shue , Chao-An Jong
IPC分类号： H01L29/94 , H01L29/00
CPC分类号： H01L45/144 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/16
摘要： A semiconductor structure includes a first conductive layer coupled to a transistor. A first dielectric layer is over the first conductive layer. A second conductive layer is within the first dielectric layer, contacting a portion of a top surface of the first conductive layer. The second conductive layer includes a cap portion extending above a top surface of the first dielectric layer. A first dielectric spacer is between the first dielectric layer and the second conductive layer. A phase change material layer is above a top surface of the second conductive layer. A third conductive layer is over the phase change material layer. A second dielectric layer is over the first dielectric layer. A second dielectric spacer is on a sidewall of the cap portion, wherein a thermal conductivity of the second dielectric spacer is less than that of the first dielectric layer or that of the second dielectric layer.
摘要翻译：半导体结构包括耦合到晶体管的第一导电层。第一电介质层在第一导电层之上。第二导电层在第一介电层内，与第一导电层的顶表面的一部分接触。第二导电层包括在第一介电层的顶表面上方延伸的盖部分。第一介电隔离物在第一介电层和第二导电层之间。相变材料层在第二导电层的顶表面之上。第三导电层在相变材料层之上。第二电介质层在第一介电层上。第二电介质间隔物位于帽部分的侧壁上，其中第二电介质间隔物的热导率小于第一电介质层或第二电介质层的热导率。

8. 发明申请

US20080308782A1 SEMICONDUCTOR MEMORY STRUCTURES 有权
标题翻译：半导体存储器结构
公开(公告)号：US20080308782A1
公开(公告)日：2008-12-18
申请号：US11763938
申请日：2007-06-15
申请人： Shau-Lin Shue , Chao-An Jong
发明人： Shau-Lin Shue , Chao-An Jong
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/1683 , H01L45/1691
摘要： A semiconductor structure includes a transistor over a substrate, the transistor comprising a gate and a contact region, which is adjacent to the gate and within the substrate. A first dielectric layer is over the contact region. A contact structure is within the first dielectric layer and over the contact region. A first electrode and a second electrode are within the first dielectric layer, wherein at least one of the first electrode and the second electrode is over the contact structure. The first electrode and second electrodes may be laterally or vertically separated. A phase change structure is disposed between the first electrode and the second electrode. The phase change structure includes at least one spacer within the first dielectric layer and a phase change material (PCM) layer over the spacer.
摘要翻译：半导体结构包括在衬底上的晶体管，晶体管包括与栅极和衬底内的栅极和接触区域。第一电介质层在接触区域之上。接触结构在第一介电层内部和接触区域之上。第一电极和第二电极在第一电介质层内，其中第一电极和第二电极中的至少一个位于接触结构之上。第一电极和第二电极可以是横向或垂直分离的。相变结构设置在第一电极和第二电极之间。相变结构包括第一介电层内的至少一个间隔物和间隔物上的相变材料（PCM）层。

9. 发明授权

US08410607B2 Semiconductor memory structures 有权
标题翻译：半导体存储器结构
公开(公告)号：US08410607B2
公开(公告)日：2013-04-02
申请号：US11763938
申请日：2007-06-15
申请人： Shau-Lin Shue , Chao-An Jong
发明人： Shau-Lin Shue , Chao-An Jong
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L45/144 , G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/1683 , H01L45/1691
摘要： A semiconductor structure includes a transistor over a substrate, the transistor comprising a gate and a contact region, which is adjacent to the gate and within the substrate. A first dielectric layer is over the contact region. A contact structure is within the first dielectric layer and over the contact region. A first electrode and a second electrode are within the first dielectric layer, wherein at least one of the first electrode and the second electrode is over the contact structure. The first electrode and second electrodes may be laterally or vertically separated. A phase change structure is disposed between the first electrode and the second electrode. The phase change structure includes at least one spacer within the first dielectric layer and a phase change material (PCM) layer over the spacer.
摘要翻译：半导体结构包括在衬底上的晶体管，所述晶体管包括与栅极和衬底内的栅极和接触区域。第一电介质层在接触区域之上。接触结构在第一介电层内部和接触区域之上。第一电极和第二电极在第一电介质层内，其中第一电极和第二电极中的至少一个位于接触结构之上。第一电极和第二电极可以是横向或垂直分离的。相变结构设置在第一电极和第二电极之间。相变结构包括第一介电层内的至少一个间隔物和间隔物上的相变材料（PCM）层。

10. 发明申请

US20090035898A1 METHOD OF FABRICATING A LAYER WITH TINY STRUCTURE AND THIN FILM TRANSISTOR COMPRISING THE SAME 审中-公开
标题翻译：具有结构的层的薄膜的制造方法和包含其的薄膜晶体管
公开(公告)号：US20090035898A1
公开(公告)日：2009-02-05
申请号：US11874820
申请日：2007-10-18
申请人： Chao-An Jong
发明人： Chao-An Jong
IPC分类号： H01L21/336 , B05D3/06
CPC分类号： H01L29/7869 , B82Y10/00
摘要： A method of fabricating a layer with a tiny structure and a thin film transistor comprising the same is disclosed. The method of fabricating the layer with a tiny structure comprises providing a substrate, coating a coating composition on the substrate to form a coating layer, wherein the coating composition comprises nano conductive particles or nano semiconductor particles having functional groups bonded on a surface thereof uniformly dispersed in a solvent, and irradiating the coating layer by an additional energy to break the functional groups, resulting in aggregation of nano conductive particles or nano semiconductor particles to form a tiny structure.
摘要翻译：公开了一种制造具有微小结构的层的方法和包括该层的薄膜晶体管。制造具有微小结构的层的方法包括提供基材，在基材上涂覆涂料组合物以形成涂层，其中涂料组合物包含具有键合在其表面上的官能团均匀分散的纳米导电颗粒或纳米半导体颗粒在溶剂中，并且通过额外的能量照射涂层以破坏官能团，导致纳米导电颗粒或纳米半导体颗粒的聚集以形成微小的结构。

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