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    • 2. 发明申请
    • MANUFACTURING METHOD FOR ARRAY SUBSTRATE WITH FRINGE FIELD SWITCHING TYPE THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY
    • 具有FRINGE场切换型薄膜晶体管液晶显示器的阵列基板的制造方法
    • US20120184060A1
    • 2012-07-19
    • US13499353
    • 2011-04-26
    • Youngsuk SongSeungjin ChoiSeongyeol Yoo
    • Youngsuk SongSeungjin ChoiSeongyeol Yoo
    • H01L33/62
    • H01L27/1288G02F2001/134372H01L27/1214
    • A manufacturing method for an array substrate with a fringe field switching (FFS) type thin film transistor (TFT) liquid crystal display (LCD) includes the following steps. A pattern of a gate line (1), a gate electrode, a common electrode (6) and a common electrode line (5) is formed by patterning a first transparent conductive film and a first metal film formed successively on a transparent substrate. Contact holes of the gate line in the pad area and a semiconductor pattern are formed through a patterning process after a gate insulator film, and a semiconductor film and a doped semiconductor film are formed successively. A second metal film is deposited and patterned. A second transparent conductive film is deposited and a lift-off process is performed. And then, a pattern of a source electrode, a drain electrode, a TFT channel and a pixel electrode (4) is formed by etching the exposed second metal film and the doped semiconductor film.
    • 具有条纹场切换(FFS)型薄膜晶体管(TFT)液晶显示器(LCD)的阵列基板的制造方法包括以下步骤。 通过对在透明基板上连续形成的第一透明导电膜和第一金属膜进行图案化,形成栅极线(1),栅电极,公共电极(6)和公共电极线(5)的图案。 在栅绝缘膜之后通过图案化工艺形成焊盘区域中的栅极线的接触孔和半导体图案,并且依次形成半导体膜和掺杂半导体膜。 沉积和图案化第二金属膜。 沉积第二透明导电膜并执行剥离过程。 然后,通过蚀刻暴露的第二金属膜和掺杂半导体膜来形成源电极,漏电极,TFT沟道和像素电极(4)的图案。
    • 3. 发明授权
    • Method for manufacturing a thin film structure
    • 薄膜结构的制造方法
    • US08017423B2
    • 2011-09-13
    • US12561344
    • 2009-09-17
    • Seongyeol YooYoungsuk SongSeungjin Choi
    • Seongyeol YooYoungsuk SongSeungjin Choi
    • H01L21/00
    • H01L29/78603H01L27/1218H01L29/66765
    • The present invention discloses a method for manufacturing thin film structure, which comprises the following steps: providing a substrate having a first recess and a second recess formed therein with the first recess being deeper than the second recess; depositing a first material layer and a second material layer of different thicknesses successively on the substrate; and grinding the substrate so that a flat upper surface is formed and the first material layer and the second material layer are remained in the first recess while only the first material layer is remained in the second recess. The present invention also discloses a method for manufacturing fringe field switching type liquid crystal display array substrate. With the present invention, it is possible to make the upper surface flat while forming patterns on two layers of thin films respectively by using a single mask.
    • 本发明公开了一种制造薄膜结构的方法,包括以下步骤:提供具有第一凹部和形成在其中的第二凹部的基板,其中第一凹部比第二凹部更深; 在衬底上依次沉积不同厚度的第一材料层和第二材料层; 并且研磨所述基板,使得形成平坦的上表面,并且所述第一材料层和所述第二材料层保留在所述第一凹部中,同时仅所述第一材料层保留在所述第二凹部中。 本发明还公开了一种用于制造条纹场开关型液晶显示阵列基板的方法。 利用本发明,可以通过使用单个掩模分别在两层薄膜上形成图案而使上表面平坦。
    • 7. 发明授权
    • Method for manufacturing array substrate of liquid crystal display
    • 制造液晶显示器阵列基板的方法
    • US08017465B2
    • 2011-09-13
    • US12565953
    • 2009-09-24
    • Seungjin ChoiYoungsuk SongSeongyeol Yoo
    • Seungjin ChoiYoungsuk SongSeongyeol Yoo
    • H01L21/336H01L21/8234
    • H01L27/1288G02F1/1368H01L27/1214
    • A method for manufacturing an array substrate of liquid crystal display is performed with the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist layer; performing a first ashing process on the photoresist layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist layer. According to the invention, the over-etching on the TFT channel region can be reduced and the display quality of the liquid crystal display can be ensured.
    • 制造液晶显示器用阵列基板的方法是通过以下步骤进行的:在其上依次提供具有栅极线,栅极绝缘层和有源层图案的基板; 在衬底上依次沉积第一透明导电层和源极/漏极金属层; 通过三色调掩模在源极/漏极金属层上形成光致抗蚀剂层; 对源极/漏极金属层和从光致抗蚀剂层露出的第一透明导电层进行湿蚀刻工艺; 在所述光致抗蚀剂层上进行第一灰化处理,对所述源极/漏极金属层,所述第一透明导电层和所述有源层图案通过所述第一灰化处理曝光进行干蚀刻处理; 对所述光致抗蚀剂层进行第二灰化处理,并对通过所述第二灰化处理暴露的所述源极/漏极金属层进行湿式蚀刻处理; 并除去剩余的光致抗蚀剂层。 根据本发明,可以减少TFT沟道区上的过蚀刻,并且可以确保液晶显示器的显示质量。
    • 9. 发明授权
    • Array substrate and method of manufacturing the same
    • 阵列基板及其制造方法
    • US08558231B2
    • 2013-10-15
    • US12724047
    • 2010-03-15
    • Youngsuk SongSeungjin ChoiSeongyeol Yoo
    • Youngsuk SongSeungjin ChoiSeongyeol Yoo
    • H01L31/20
    • H01L27/127H01L27/1248H01L27/1288
    • The present invention provides an array substrate comprising: a substrate, having a thin film transistor (TFT) formed thereupon, the TFT having a gate electrode, a source electrode and a drain electrode; a first metal layer, formed on the substrate, and comprising a gate line and the gate electrode of the TFT; a first insulating layer, covering the first metal layer and the substrate; a semiconductor layer, an ohmic contact layer, and a second metal layer, which are sequentially formed on the first insulating layer; a second insulating layer, covering the semiconductor layer, the ohmic contact layer, and the second metal layer; a pixel electrode, provided on the second insulating layer and is connected to the drain electrode. The second metal layer further comprises an etch-blocking pattern in the peripheral area of the pixel electrode within the overlapping region between the pixel electrode and the first metal layer.
    • 本发明提供了一种阵列基板,包括:具有形成在其上的薄膜晶体管(TFT)的基板,所述TFT具有栅电极,源电极和漏电极; 第一金属层,形成在所述基板上,并且包括所述TFT的栅极线和所述栅电极; 覆盖所述第一金属层和所述基板的第一绝缘层; 半导体层,欧姆接触层和第二金属层,其顺序地形成在所述第一绝缘层上; 覆盖半导体层,欧姆接触层和第二金属层的第二绝缘层; 像素电极,设置在第二绝缘层上并连接到漏电极。 第二金属层还包括在像素电极和第一金属层之间的重叠区域内的像素电极的周边区域中的蚀刻阻挡图案。