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    • 6. 发明授权
    • Method of fabricating a high voltage semiconductor device using SIPOS
    • 使用SIPOS制造高压半导体器件的方法
    • US06660570B2
    • 2003-12-09
    • US10140181
    • 2002-05-08
    • Jin-kyeong KimJong-min KimKyung-wook KimTae-hoon KimCheol ChoiChang-wook Kim
    • Jin-kyeong KimJong-min KimKyung-wook KimTae-hoon KimCheol ChoiChang-wook Kim
    • H01L21332
    • H01L29/405H01L29/66272H01L29/73H01L29/7322
    • A high voltage semiconductor device including a semiconductor substrate on which a semi-insulating polycrystalline silicon layer is formed to alleviate electric field concentration in a field region, is disclosed. A thermal oxide layer is formed on the semi-insulating polycrystalline silicon layer to serve as a protective layer. The thermal oxide layer forms a good interface with the semi-insulating polycrystalline silicon layer compared to a wet etched oxide layer or a chemical vapor deposition (CVD) oxide layer, thereby decreasing the amount of leakage current. In addition, compared to a dual semi-insulating polycrystalline silicon layer, the thermal oxide layer exhibits a high surface protection effect and a high resistance against dielectric breakdown. It also allows a great reduction in fabrication time. In particular, the semi-insulating polycrystalline silicon layer is removed from the active region, thereby preventing the direct current (DC) gain of a device from being lowered within a low collector current range caused by the semi-insulating polycrystalline silicon layer.
    • 公开了一种包括半导体衬底的高电压半导体器件,半导体衬底上形成有半绝缘多晶硅层以减轻场区域中的电场集中。 在半绝缘多晶硅层上形成热氧化层作为保护层。 与湿蚀刻氧化物层或化学气相沉积(CVD)氧化物层相比,热氧化物层与半绝缘多晶硅层形成良好的界面,从而减少漏电流量。 另外,与双半绝缘多晶硅层相比,热氧化层具有高的表面保护效果和高耐电介质击穿电阻。 它还可以大大减少制造时间。 特别地,从有源区域去除半绝缘多晶硅层,从而防止器件的直流(DC)增益在由半绝缘多晶硅层引起的集电极电流范围内降低。