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    • 6. 发明申请
    • PHOTOELECTRIC CONVERSION DEVICE
    • 光电转换器件
    • US20120280232A1
    • 2012-11-08
    • US13411661
    • 2012-03-05
    • Seung-Jae JUNGYuk-Hyun NAMKi-Won Jeon
    • Seung-Jae JUNGYuk-Hyun NAMKi-Won Jeon
    • H01L31/0376
    • H01L31/028H01L31/076Y02E10/547Y02E10/548
    • A photoelectric conversion device includes a first photoelectric conversion unit on a substrate and having a first energy bandgap, a second photoelectric conversion unit having a second energy bandgap that is different from the first energy bandgap, the second photoelectric conversion unit being on the first photoelectric conversion unit, and an intermediate unit between the first and second photoelectric conversion units, the intermediate unit including a stack of a first intermediate layer and a second intermediate layer, each of the first intermediate layer and the second intermediate layer having a refractive index that is smaller than that of the first photoelectric conversion unit, the first intermediate layer having a first refractive index, and the second intermediate layer having a second refractive index that is smaller than the first refractive index.
    • 光电转换装置包括在基板上具有第一能带隙的第一光电转换单元,具有与第一能带隙不同的第二能带隙的第二光电转换单元,第二光电转换单元处于第一光电转换 单元和第一和第二光电转换单元之间的中间单元,所述中间单元包括第一中间层和第二中间层的堆叠,所述第一中间层和所述第二中间层中的每一个具有较小的折射率 第一中间层具有第一折射率,第二中间层的第二折射率小于第一折射率。
    • 9. 发明申请
    • VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    • 可变电阻存储器件及其制造方法
    • US20160197121A1
    • 2016-07-07
    • US14984477
    • 2015-12-30
    • Jin-Woo LEEYoun-Sean KANGSeung-Jae JUNGHyun-Su JUMasayuki TERAI
    • Jin-Woo LEEYoun-Sean KANGSeung-Jae JUNGHyun-Su JUMasayuki TERAI
    • H01L27/24H01L43/08H01L43/02H01L45/00H01L27/22
    • H01L27/2463H01L27/224H01L27/2409H01L43/12H01L45/1675
    • A variable resistance memory device includes a plurality of first conductive layer pattern, a plurality of second conductive layer patterns over the first conductive layer patterns, and a plurality of lower cell structures including a switching element and a variable resistance element, the lower cell structures being formed at intersections at which the first conductive layer patterns and the second conductive layer patterns overlap each other. The first conductive layer patterns, the second conductive layer patterns and the lower cell structures serves as one of a memory cell, a first dummy pattern structure and a second dummy pattern structure. The first dummy pattern structure is formed on both edge portions in the first direction, and the second conductive layer pattern of the first dummy pattern structure protrudes in the first direction from a sidewall of the lower cell structure thereunder, and the second dummy pattern structure is formed on both edge portions in the second direction, and the first conductive layer pattern of the second dummy pattern structure protrudes in the second direction from a sidewall of the lower cell structure thereon. Failures of the variable resistance memory device due to the etch residue may decrease.
    • 可变电阻存储器件包括多个第一导电层图案,多个第一导电层图案上的第二导电层图案,以及包括开关元件和可变电阻元件的多个下单元结构,下单元结构为 形成在第一导电层图案和第二导电层图案彼此重叠的交点处。 第一导电层图案,第二导电层图案和下单元结构用作存储单元,第一虚设图案结构和第二虚设图案结构之一。 第一虚设图形结构形成在第一方向的两个边缘部分上,第一虚设图案结构的第二导电层图案从其下部单元结构的侧壁沿第一方向突出,第二虚设图案结构为 形成在第二方向的两个边缘部分上,并且第二虚设图案结构的第一导电层图案在其下面的单元结构的侧壁上沿第二方向突出。 由于蚀刻残留导致的可变电阻存储器件的故障可能降低。