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1. 发明授权

US07506284B2 Event driven switch level simulation method and simulator 有权
标题翻译：事件驱动开关级仿真方法和仿真器
公开(公告)号：US07506284B2
公开(公告)日：2009-03-17
申请号：US11336744
申请日：2006-01-19
申请人： Seuk-Whan Lee , Moon-Hyun Yoo , Joon-Ho Choi
发明人： Seuk-Whan Lee , Moon-Hyun Yoo , Joon-Ho Choi
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： A method for simulating an integrated circuit includes performing a power supply voltage tuning operation to find a power supply voltage at which a simulation of the integrated circuit at an operating frequency passes a functional requirement, identifying a weak signal node based on the simulation result, and performing a size tuning operation on the weak signal node of the integrated circuit.
摘要翻译：一种用于模拟集成电路的方法包括执行电源电压调整操作以找到工作频率下的集成电路的模拟通过功能需求的电源电压，基于模拟结果识别弱信号节点，以及对集成电路的弱信号节点执行尺寸调整操作。

2. 发明申请

US20060190862A1 Event driven switch level simulation method and simulator 有权
公开(公告)号：US20060190862A1
公开(公告)日：2006-08-24
申请号：US11336744
申请日：2006-01-19
申请人： Seuk-Whan Lee , Moon-Hyun Yoo , Joon-Ho Choi
发明人： Seuk-Whan Lee , Moon-Hyun Yoo , Joon-Ho Choi
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： A method for simulating an integrated circuit includes performing a power supply voltage tuning operation to find a power supply voltage at which a simulation of the integrated circuit at an operating frequency passes a functional requirement, identifying a weak signal node based on the simulation result, and performing a size tuning operation on the weak signal node of the integrated circuit.

3. 发明授权

US07100125B2 Aggressor classification method for analyzing crosstalk of circuit 有权
公开(公告)号：US07100125B2
公开(公告)日：2006-08-29
申请号：US10457243
申请日：2003-06-08
申请人： Jae-Seok Yang , Jeong-Taek Kong , Moon-Hyun Yoo , Jeong-Yeol Kim , Joon-Ho Choi
发明人： Jae-Seok Yang , Jeong-Taek Kong , Moon-Hyun Yoo , Jeong-Yeol Kim , Joon-Ho Choi
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Functional and temporal aggressor classification methods that provide increased efficiency and accuracy for classifying aggressor signal lines of an integrated circuit for purposes of analyzing crosstalk of the circuit. In one aspect, an aggressor classification method for analyzing crosstalk of a circuit comprises (a) obtaining CNF (conjunction normal form) clauses of signal lines from a victim to a predetermined signal line and from an aggressor to a predetermined signal line for circuit analysis using a backward search, and obtaining CNF clauses of the victim and the aggressor, and summing up the CNF clauses of the victim and the aggressor to obtain a final CNF clause, (b) obtaining CNF clauses with respect to various cases in which logic values of the victims and aggressors are varied in the final CNF clause, and (c) analyzing the CNF clauses obtained in step (b) to classify aggressors as true or false aggressors, wherein an aggressor is classified as a true aggressor if a result of a given CNF clause has a vector, and classifying an aggressor as a false aggressor if a result of a given CNF clause has no vector.

4. 发明授权

US07343215B2 Methothology for estimating statistical distribution characteristics of product parameters 有权
标题翻译：用于估计产品参数的统计分布特征的方法
公开(公告)号：US07343215B2
公开(公告)日：2008-03-11
申请号：US11656715
申请日：2007-01-23
申请人： Sung-Hee Yun , Seung-Ho Jung , Dae-Wook Kim , Moon-Hyun Yoo , Jong-Bae Lee
发明人： Sung-Hee Yun , Seung-Ho Jung , Dae-Wook Kim , Moon-Hyun Yoo , Jong-Bae Lee
IPC分类号： G06F19/00
CPC分类号： G06F17/5036 , G01R31/318357
摘要： Disclosed is method for estimating statistical distribution characteristics of product parameters. The method comprises determining n number of product parameters, which characterize a product, and m number of characteristic parameters dependent on the product parameters, determining m number of correlation functions that represent the characteristic parameters in terms of the product parameters, and obtaining inverse functions of the correlation functions that represent the product parameters in terms of the characteristic parameters. After fabricating test products to empirically determine quantitative relations between the product and characteristic parameters, the method includes measuring k number of test products and preparing measured data of the characteristic parameters. Thereafter, the method includes estimating statistical characteristics of the product parameters corresponding with a distribution of the measured data of the characteristic parameters using inverse functions of the correlation functions.
摘要翻译：公开了用于估计产品参数的统计分布特征的方法。该方法包括：根据产品参数确定n个产品参数，表征产品，以及m个特征参数，根据产品参数确定表示特征参数的m个相关函数，并获得根据特征参数表示产品参数的相关函数。在制作测试产品以经验确定产品与特征参数的定量关系后，该方法包括测量k个测试产品并准备特征参数的测量数据。此后，该方法包括使用相关函数的反函数来估计与特征参数的测量数据的分布相对应的乘积参数的统计特性。

5. 发明申请

US20110142325A1 METHOD OF INSPECTING A MASK 有权
标题翻译：检查面膜的方法
公开(公告)号：US20110142325A1
公开(公告)日：2011-06-16
申请号：US12968725
申请日：2010-12-15
申请人： Yoonna OH , Jae-Pil Shin , Jin Choi , Moon-Hyun Yoo , Jong-Bae Lee
发明人： Yoonna OH , Jae-Pil Shin , Jin Choi , Moon-Hyun Yoo , Jong-Bae Lee
IPC分类号： G06K9/00
CPC分类号： G06T7/0006 , G03F1/84 , G06T2207/10061 , G06T2207/20068 , G06T2207/30148
摘要： In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved.
摘要翻译：在检查掩模的方法中，可以获得掩模上的图案的图像。可以获得灰度级的图像的直方图。可以将直方图与图案的信息进行比较以检测掩模的缺陷。因此，掩模中的缺陷检测的可靠性可以显着提高。

6. 发明授权

US07617065B2 Methodology for estimating statistical distribution characteristics of physical parameters of semiconductor device 失效
标题翻译：估算半导体器件物理参数统计分布特征的方法
公开(公告)号：US07617065B2
公开(公告)日：2009-11-10
申请号：US11698690
申请日：2007-01-26
申请人： Dae-Wook Kim , Sang-Hoon Lee , Ji-Seong Doh , Moon-Hyun Yoo , Jong-Bae Lee
发明人： Dae-Wook Kim , Sang-Hoon Lee , Ji-Seong Doh , Moon-Hyun Yoo , Jong-Bae Lee
IPC分类号： G06F17/00
CPC分类号： G06F17/5009 , G01R31/31711 , G01R31/318314 , G06F2217/10 , G06F2217/78
摘要： A method for estimating statistical distribution characteristics of physical parameters of a semiconductor device includes manufacturing a plurality of semiconductor device chips, each having a plurality of transistors, preparing electrical characteristic data by measuring electrical characteristics of the plurality of transistors included in the plurality of chips, extracting an inter-chip distribution characteristic and an intra-chip distribution characteristic of the electrical characteristics by analyzing the electrical characteristic data, generating random number data satisfying the extracted inter-chip and intra-chip distribution characteristics, and performing a simulation for extracting statistical distribution characteristic data of the physical parameters of the chips, based on the random number data.
摘要翻译：一种用于估计半导体器件的物理参数的统计分布特性的方法包括制造多个半导体器件芯片，每个半导体器件芯片具有多个晶体管，通过测量包括在多个芯片中的多个晶体管的电特性来制备电特性数据，通过分析电特性数据，产生满足提取的芯片间和片内分布特性的随机数数据，提取电特性的片间分布特性和芯片内分布特性，并执行用于提取统计分布的模拟基于随机数数据的芯片的物理参数的特征数据。

7. 发明授权

US07097949B2 Phase edge phase shift mask enforcing a width of a field gate image and fabrication method thereof 失效
标题翻译：实施场栅图像的宽度的相位相移掩模及其制造方法
公开(公告)号：US07097949B2
公开(公告)日：2006-08-29
申请号：US10688591
申请日：2003-10-17
申请人： Dong-Hyun Kim , Moon-Hyun Yoo , Jeong-Lim Nam , Yoo-Hyon Kim , Chul-Hong Park , Soo-Han Choi , Young-Chan Ban , Hye-Soo Shin
发明人： Dong-Hyun Kim , Moon-Hyun Yoo , Jeong-Lim Nam , Yoo-Hyon Kim , Chul-Hong Park , Soo-Han Choi , Young-Chan Ban , Hye-Soo Shin
IPC分类号： G01F9/00
CPC分类号： G03F1/34 , G03F1/70
摘要： A phase edge phase shift mask and a fabrication method thereof for enforcing a width of a field gate image located on a field region, which is weakened by a two exposure process, by using a phase shift mask and a trim mask on a semiconductor substrate, and enforcing a width of the field gate image to maximize a current driving capability of the semiconductor device.
摘要翻译：一种相位相移掩模及其制造方法，用于通过在半导体衬底上使用相移掩模和修剪掩模来强化位于通过两次曝光处理削弱的场区域上的场栅图像的宽度，并施加栅极栅极图像的宽度以最大化半导体器件的电流驱动能力。

8. 发明授权

US07361435B2 Method of creating a layout of a set of masks 失效
标题翻译：创建一组掩码的布局的方法
公开(公告)号：US07361435B2
公开(公告)日：2008-04-22
申请号：US11289204
申请日：2005-11-28
申请人： Chul-Hong Park , Moon-Hyun Yoo , Yoo-Hyon Kim , Dong-Hyun Kim , Soo-Han Choi
发明人： Chul-Hong Park , Moon-Hyun Yoo , Yoo-Hyon Kim , Dong-Hyun Kim , Soo-Han Choi
IPC分类号： G03F1/00 , G03F1/14 , G06F17/50
CPC分类号： G03F1/30 , G03F1/32 , G03F1/70 , G03F7/70466
摘要： A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.
摘要翻译：提供了一种创建包括交替相移掩模（APSM）和半色调相移修剪蒙版（HPSTM）的掩模组的布局的方法。 APSM包括第一和第二相移区域和第一不透明图案。第一和第二相移区域彼此相邻设置并且具有不同的相位以产生破坏性干扰。此外，第一和第二相移区域限定了接入互连线。第一不透明图案形成在透明基板上以限定第一和第二相移区域。 HPSTM在透明基板上包括第二不透明图案和半色调图案。第二个不透明图案防止访问互连线被擦除。半色调图案定义了连接到接入互连线的通过互连线。

9. 发明申请

US20070192077A1 Methodology for estimating statistical distribution characteristics of physical parameters of semiconductor device 失效
标题翻译：估算半导体器件物理参数统计分布特征的方法
公开(公告)号：US20070192077A1
公开(公告)日：2007-08-16
申请号：US11698690
申请日：2007-01-26
申请人： Dae-Wook Kim , Sang-Hoon Lee , Ji-Seong Doh , Moon-Hyun Yoo , Jong-Bae Lee
发明人： Dae-Wook Kim , Sang-Hoon Lee , Ji-Seong Doh , Moon-Hyun Yoo , Jong-Bae Lee
IPC分类号： G06F17/50 , G06G7/62
CPC分类号： G06F17/5009 , G01R31/31711 , G01R31/318314 , G06F2217/10 , G06F2217/78
摘要： A method for estimating statistical distribution characteristics of physical parameters of a semiconductor device includes manufacturing a plurality of semiconductor device chips, each having a plurality of transistors, preparing electrical characteristic data by measuring electrical characteristics of the plurality of transistors included in the plurality of chips, extracting an inter-chip distribution characteristic and an intra-chip distribution characteristic of the electrical characteristics by analyzing the electrical characteristic data, generating random number data satisfying the extracted inter-chip and intra-chip distribution characteristics, and performing a simulation for extracting statistical distribution characteristic data of the physical parameters of the chips, based on the random number data.
摘要翻译：一种用于估计半导体器件的物理参数的统计分布特性的方法包括制造多个半导体器件芯片，每个半导体器件芯片具有多个晶体管，通过测量包括在多个芯片中的多个晶体管的电特性来制备电特性数据，通过分析电特性数据，产生满足提取的芯片间和片内分布特性的随机数数据，提取电特性的片间分布特性和芯片内分布特性，并执行用于提取统计分布的模拟基于随机数数据的芯片的物理参数的特征数据。

10. 发明申请

US20070174802A1 METHOD OF ADJUSTING PATTERN DENSITY 审中-公开
标题翻译：调整图案密度的方法
公开(公告)号：US20070174802A1
公开(公告)日：2007-07-26
申请号：US11625569
申请日：2007-01-22
申请人： Jae-Pil SHIN , Moon-Hyun Yoo , Jong-Bae Lee , Jin-Sook Choi , Sung Gyu Park
发明人： Jae-Pil SHIN , Moon-Hyun Yoo , Jong-Bae Lee , Jin-Sook Choi , Sung Gyu Park
IPC分类号： G06F17/50
CPC分类号： G03F1/80 , G03F1/36
摘要： A method of adjusting pattern density includes determining a reference pattern density, defining dummy generation fields and designed patterns, forming basic dummy patterns on the dummy generation fields, evaluating a total pattern density from a sum of a density of the designed patterns and a density of the basic dummy patterns, adjusting a size of the basic dummy patterns so that the total pattern density reaches the reference pattern density, and combining data of the adjusted dummy patterns with data of the designed patterns.
摘要翻译：调整图案密度的方法包括确定参考图案密度，定义虚拟生成区域和设计图案，在虚拟生成区域上形成基本虚拟图案，从设计图案的密度和密度之和评估总图案密度基本虚拟图案，调整基本虚拟图案的尺寸，使得总图案密度达到参考图案密度，以及将调整的图案数据与设计图案的数据组合。

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