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1. 发明申请

US20090283302A1 Printed circuit board and manufacturing method thereof 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20090283302A1
公开(公告)日：2009-11-19
申请号：US12318748
申请日：2009-01-07
申请人： Seok-Kyu Lee , Shuhichi Okabe , Seung-Hyun Cho , Jae-Joon Lee
发明人： Seok-Kyu Lee , Shuhichi Okabe , Seung-Hyun Cho , Jae-Joon Lee
IPC分类号： H05K1/00 , H05K3/46 , H05K3/22
CPC分类号： H05K3/4682 , H05K1/0271 , H05K3/181 , H05K3/20 , H05K3/28 , H05K2201/09781 , H05K2201/2009 , H05K2203/0156
摘要： Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board in accordance with the present invention includes: a circuit laminate, a solder resist laminated on the circuit laminate, a metal support layer formed on the solder resist, a stiffener formed on the metal support layer.
摘要翻译：公开了一种印刷电路板及其制造方法。根据本发明的印刷电路板包括：电路层叠体，层叠在电路层叠体上的阻焊剂，形成在阻焊剂上的金属支撑层，形成在金属支撑层上的加强件。

2. 发明申请

US20090038837A1 Multilayered printed circuit board and manufacturing method thereof 审中-公开
标题翻译：多层印刷电路板及其制造方法
公开(公告)号：US20090038837A1
公开(公告)日：2009-02-12
申请号：US12078176
申请日：2008-03-27
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
IPC分类号： H05K1/11 , B32B38/10
CPC分类号： H05K3/462 , H05K3/205 , H05K3/243 , H05K3/421 , H05K3/4623 , H05K3/4644 , H05K2201/09527 , H05K2201/09563 , H05K2201/096
摘要： A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.
摘要翻译：公开了一种多层印刷电路板。一种制造多层印刷电路板的方法，包括：在载体上依次形成金属层和下电路形成图案，并通过在下电路形成图案中填充导电材料形成下层电路; 去除下部电路形成图案，堆叠绝缘树脂，并形成与下部电路连接的至少一个通孔; 在所述绝缘树脂上形成至少一个内部电路和连接所述内部电路与所述下部电路的至少一个层间连接器，以形成一对电路部件; 并且将一对电路部件对准，将一对电路部件彼此连接，并且移除载体和金属层，允许形成精细的电路并提供薄板，同时防止板的弯曲和翘曲。

3. 发明授权

US07971352B2 Method of manufacturing printed circuit board 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：US07971352B2
公开(公告)日：2011-07-05
申请号：US12213465
申请日：2008-06-19
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
IPC分类号： H01R9/00 , H05K3/00
CPC分类号： H05K3/4682 , H05K3/108 , H05K3/205 , H05K3/3473 , H05K2201/0367 , H05K2203/0376 , H05K2203/043 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149
摘要： A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
摘要翻译：一种制造具有焊球的印刷电路板的方法。该方法可以包括：在第一载体的一侧堆叠形成有至少一个孔的第二载体; 通过用导电材料填充孔而形成至少一个焊料凸块; 在所述第二载体上形成与所述焊料凸块电连接的电路图案层; 以及通过去除所述第一载体和所述第二载体来暴露所述焊料凸块。使用这种方法，可以形成具有细间距的均匀的半球形焊球作为制造过程的一部分，而不必分别附接焊球。可以在制造过程中使用载体作为支撑体，从而可以防止板的变形。

4. 发明申请

US20090151160A1 Method of manufacturing printed circuit board 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：US20090151160A1
公开(公告)日：2009-06-18
申请号：US12213465
申请日：2008-06-19
申请人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
发明人： Shuhichi Okabe , Jin-Yong An , Seok-Kyu Lee , Soon-Oh Jung , Jong-Kuk Hong , Hae-Nam Seo
IPC分类号： H05K3/10 , H05K3/36
CPC分类号： H05K3/4682 , H05K3/108 , H05K3/205 , H05K3/3473 , H05K2201/0367 , H05K2203/0376 , H05K2203/043 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49149
摘要： A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
摘要翻译：一种制造具有焊球的印刷电路板的方法。该方法可以包括：在第一载体的一侧堆叠形成有至少一个孔的第二载体; 通过用导电材料填充孔而形成至少一个焊料凸块; 在所述第二载体上形成与所述焊料凸块电连接的电路图案层; 以及通过去除所述第一载体和所述第二载体来暴露所述焊料凸块。使用这种方法，可以形成具有细间距的均匀的半球形焊球作为制造过程的一部分，而不必分别附接焊球。可以在制造过程中使用载体作为支撑体，从而可以防止板的变形。

5. 发明申请

US20090242238A1 Buried pattern substrate 审中-公开
标题翻译：埋地图案衬底
公开(公告)号：US20090242238A1
公开(公告)日：2009-10-01
申请号：US12457166
申请日：2009-06-02
申请人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
发明人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H05K1/09
CPC分类号： H05K3/205 , H05K3/4038 , H05K3/4617 , H05K2203/0733 , H05K2203/1572
摘要： A buried pattern substrate includes an insulation layer; a circuit pattern buried in the insulation layer such that a part thereof is exposed at a surface of the insulation layer; and a stud bump buried in the insulation layer such that one end portion is exposed at one surface of the insulation layer, and such that the other end portion is exposed at the other surface of the insulation layer.
摘要翻译：掩埋图案衬底包括绝缘层; 埋置在绝缘层中的电路图案，使得其一部分在绝缘层的表面露出; 以及埋在所述绝缘层中的螺柱凸起，使得一个端部暴露在所述绝缘层的一个表面处，并且使得所述另一端部暴露在所述绝缘层的另一个表面处。

6. 发明申请

US20070130761A1 Method of manufacturing printed circuit board having landless via hole 失效
标题翻译：具有无通孔的印刷电路板的制造方法
公开(公告)号：US20070130761A1
公开(公告)日：2007-06-14
申请号：US11591586
申请日：2006-11-02
申请人： Myung Kang , Shuhichi Okabe , Jung Park , Hoe Jung , Ji Kim
发明人： Myung Kang , Shuhichi Okabe , Jung Park , Hoe Jung , Ji Kim
IPC分类号： H05K1/11
CPC分类号： H05K1/116 , H05K3/0094 , H05K3/421 , H05K3/428 , H05K2201/09509 , H05K2201/09545 , H05K2201/0959 , H05K2203/0361 , H05K2203/0384 , H05K2203/0542 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49133 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： Disclosed is a method of manufacturing a printed circuit board having a landless via hole. Specifically, this invention provides a method of manufacturing a printed circuit board having a landless via hole without the upper land of a via hole using a photoresist (P-LPR) which is loaded in the via hole. Therefore, in this invention, since a circuit pattern is formed using only copper of a copper clad laminate, the width thereof is minimized, thus easily realizing a fine circuit pattern. Further, the landless via hole structure is applied, resulting in a highly dense circuit pattern.
摘要翻译：公开了一种具有无地过孔的印刷电路板的制造方法。具体而言，本发明提供一种制造印刷电路板的方法，所述印刷电路板具有无通孔通孔，所述无通孔通孔使用装载在所述通孔中的光致抗蚀剂（P-LPR）而不具有通孔的上部焊盘。因此，在本发明中，由于仅使用覆铜层压板的铜形成电路图案，所以其宽度被最小化，因此容易实现精细电路图案。此外，施加无地通孔结构，导致高度密集的电路图案。

7. 发明申请

US20080264676A1 Circuit board and method for manufaturing thereof 有权
标题翻译：电路板及其制造方法
公开(公告)号：US20080264676A1
公开(公告)日：2008-10-30
申请号：US11976207
申请日：2007-10-22
申请人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Jeong-Woo Park , Ji-Eun Kim
发明人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Jeong-Woo Park , Ji-Eun Kim
IPC分类号： H05K1/00
CPC分类号： H05K1/0265 , H05K1/116 , H05K3/107 , H05K3/108 , H05K3/205 , H05K3/421 , H05K2201/0379 , H05K2201/0394 , H05K2201/09509 , H05K2201/09736 , H05K2203/0361
摘要： A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.
摘要翻译：一种电路板的制造方法，其特征在于，包括：在堆叠在载体上的种子层上，形成导电消除图案，所述导电解像图案包括依次与第一电路图案对应地层叠的第一镀层，第一金属层和第二镀层 ; 将载体和绝缘体堆叠并压在一起，使得具有导电缓冲图案的载体的表面面向绝缘体; 通过移除载体将导电释放图案转印到绝缘体中; 在具有转印的导电消除图案的绝缘体的表面上形成包括与第二电路图案顺序堆叠的第三镀层和第二金属层的导电图案; 去除第一镀层和籽晶层; 并且去除第一和第二金属层可以提供具有高密度电路图案而不增加绝缘体量的电路板。

8. 发明申请

US20080261158A1 Method of manufacturing printed circuit board 失效
标题翻译：制造印刷电路板的方法
公开(公告)号：US20080261158A1
公开(公告)日：2008-10-23
申请号：US12068125
申请日：2008-02-01
申请人： Ji-Hong Jo , Shuhichi Okabe
发明人： Ji-Hong Jo , Shuhichi Okabe
IPC分类号： G03F7/20
CPC分类号： H05K3/205 , H05K3/045 , H05K3/107 , H05K2201/0376 , H05K2203/0108 , H05K2203/0113 , H05K2203/0117
摘要： A method of manufacturing a printed circuit board is disclosed. The method includes: forming a relievo pattern and an intaglio pattern on a surface of a base plate; forming a metal plate, which has a metal pattern that corresponds with a shape of the relievo pattern and the intaglio pattern, by plating a surface of the relievo pattern and a surface of the intaglio pattern; separating the metal plate from the base plate; pressing the metal plate onto an insulation layer with the metal pattern facing the insulation layer; and removing a portion of the metal plate such that the metal pattern is exposed. Since this method does not use carriers, there is no need for a chemical etching process for carrier removal.
摘要翻译：公开了一种制造印刷电路板的方法。该方法包括：在基板的表面上形成解除图案和凹版图案; 通过电镀所述消光图案的表面和所述凹版图案的表面，形成金属板，所述金属板具有与所述缓和图案和所述凹版图案的形状相对应的金属图案; 将金属板与基板分离; 将金属板压在绝缘层上，金属图案面向绝缘层; 以及去除所述金属板的一部分以使得所述金属图案露出。由于该方法不使用载体，因此不需要用于载体去除的化学蚀刻方法。

9. 发明申请

US20080009128A1 Buried pattern substrate and manufacturing method thereof 审中-公开
标题翻译：埋地图案基板及其制造方法
公开(公告)号：US20080009128A1
公开(公告)日：2008-01-10
申请号：US11708339
申请日：2007-02-21
申请人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
发明人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H01L21/44
CPC分类号： H05K3/205 , H05K3/4038 , H05K3/4617 , H05K2203/0733 , H05K2203/1572
摘要： A buried pattern substrate and a manufacturing method thereof are disclosed. A method of manufacturing a buried pattern substrate having a circuit pattern formed on a surface, in which the circuit pattern is connected electrically by a stud bump, includes (a) forming the circuit pattern and the stud bump by depositing a plating layer selectively on a seed layer of a carrier film, where the seed layer is laminated on a surface of the carrier film, (b) laminating and pressing the carrier film on an insulation layer such that the circuit pattern and the stud bump face the insulation layer, and (c) removing the carrier film and the seed layer, allows the circuit interconnection to be realized using a copper (Cu) stud bump, so that a drilling process for interconnection is unnecessary, the degree of freedom for circuit design is improved, a via land is made unnecessary and the size of a via is small, to allow higher density in a circuit.
摘要翻译：公开了掩埋图案基板及其制造方法。一种制造埋设图形衬底的方法，其中电路图案形成在电路图形通过柱形凸块电连接的表面上，包括：（a）通过在晶种层层叠在载体膜的表面上的载体膜的种子层，（b）在绝缘层上层叠压制载体膜，使得电路图案和柱状凸块面向绝缘层，和 c）去除载体膜和种子层，允许使用铜（Cu）柱状凸块实现电路互连，使得不需要用于互连的钻孔工艺，提高了电路设计的自由度，通孔焊盘不必要，并且通孔的尺寸小，以允许电路中的较高密度。

10. 发明授权

US07824838B2 Method of manufacturing printed circuit board 失效
标题翻译：制造印刷电路板的方法
公开(公告)号：US07824838B2
公开(公告)日：2010-11-02
申请号：US12068125
申请日：2008-02-01
申请人： Ji-Hong Jo , Shuhichi Okabe
发明人： Ji-Hong Jo , Shuhichi Okabe
IPC分类号： G03F7/00 , G03F7/26 , G03F7/40
CPC分类号： H05K3/205 , H05K3/045 , H05K3/107 , H05K2201/0376 , H05K2203/0108 , H05K2203/0113 , H05K2203/0117
摘要： A method of manufacturing a printed circuit board is disclosed. The method includes: forming a relievo pattern and an intaglio pattern on a surface of a base plate; forming a metal plate, which has a metal pattern that corresponds with a shape of the relievo pattern and the intaglio pattern, by plating a surface of the relievo pattern and a surface of the intaglio pattern; separating the metal plate from the base plate; pressing the metal plate onto an insulation layer with the metal pattern facing the insulation layer; and removing a portion of the metal plate such that the metal pattern is exposed. Since this method does not use carriers, there is no need for a chemical etching process for carrier removal.
摘要翻译：公开了一种制造印刷电路板的方法。该方法包括：在基板的表面上形成解除图案和凹版图案; 通过电镀所述消光图案的表面和所述凹版图案的表面，形成金属板，所述金属板具有与所述缓和图案和所述凹版图案的形状相对应的金属图案; 将金属板与基板分离; 将金属板压在绝缘层上，金属图案面向绝缘层; 以及去除所述金属板的一部分以使得所述金属图案露出。由于该方法不使用载体，因此不需要用于载体去除的化学蚀刻方法。

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