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1. 发明申请

US20110101499A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110101499A1
公开(公告)日：2011-05-05
申请号：US12641073
申请日：2009-12-17
申请人： Jin-A Kim , Seok-Ho Jie
发明人： Jin-A Kim , Seok-Ho Jie
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10894 , H01L27/105 , H01L27/10852
摘要： A semiconductor device and a method for fabricating a semiconductor device are provided. The method for fabricating a semiconductor device includes forming an isolation layer over a semiconductor substrate defining first and second regions, etching the isolation layer at an edge of the first region to form a guard ring pattern, forming a buried guard ring filling the guard ring pattern, selectively etching the isolation layer of the first region to form a plurality of patterns, forming a plurality of conductive patterns in the respective patterns, and completely removing the isolation layer of the first region through a dip-out process.
摘要翻译：提供半导体器件和制造半导体器件的方法。制造半导体器件的方法包括在限定第一和第二区域的半导体衬底上形成隔离层，在第一区域的边缘蚀刻隔离层以形成保护环图案，形成填充保护环图案的掩埋保护环选择性地蚀刻第一区域的隔离层以形成多个图案，在各图案中形成多个导电图案，并且通过浸出工艺完全去除第一区域的隔离层。

2. 发明授权

US08324049B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08324049B2
公开(公告)日：2012-12-04
申请号：US12641073
申请日：2009-12-17
申请人： Jin-A Kim , Seok-Ho Jie
发明人： Jin-A Kim , Seok-Ho Jie
IPC分类号： H01L21/8242
CPC分类号： H01L27/10894 , H01L27/105 , H01L27/10852
摘要： A semiconductor device and a method for fabricating a semiconductor device are provided. The method for fabricating a semiconductor device includes forming an isolation layer over a semiconductor substrate defining first and second regions, etching the isolation layer at an edge of the first region to form a guard ring pattern, forming a buried guard ring filling the guard ring pattern, selectively etching the isolation layer of the first region to form a plurality of patterns, forming a plurality of conductive patterns in the respective patterns, and completely removing the isolation layer of the first region through a dip-out process.
摘要翻译：提供半导体器件和制造半导体器件的方法。制造半导体器件的方法包括在限定第一和第二区域的半导体衬底上形成隔离层，在第一区域的边缘蚀刻隔离层以形成保护环图案，形成填充保护环图案的掩埋保护环选择性地蚀刻第一区域的隔离层以形成多个图案，在各图案中形成多个导电图案，并且通过浸出工艺完全去除第一区域的隔离层。

3. 发明授权

US08648440B2 Semiconductor device employing nitride floating capacitor (NFC) 有权
标题翻译：采用氮化物浮动电容器（NFC）的半导体器件
公开(公告)号：US08648440B2
公开(公告)日：2014-02-11
申请号：US12829837
申请日：2010-07-02
申请人： Seok-Ho Jie
发明人： Seok-Ho Jie
IPC分类号： H01L21/02
CPC分类号： H01L28/90 , H01L27/10852 , H01L27/10894
摘要： A semiconductor device includes: a substrate configured to include cell regions and a peripheral region around the cell regions; storage nodes arranged in each of the cell regions; a first support pattern configured in each cell region to support the storage nodes; and a second support pattern configured in the peripheral region to couple first support patterns to each other.
摘要翻译：半导体器件包括：衬底，被配置为包括围绕单元区域的单元区域和周边区域; 布置在每个单元区域中的存储节点; 配置在每个单元区域中以支持所述存储节点的第一支持模式; 以及配置在所述周边区域中以将第一支撑图案彼此耦合的第二支撑图案。

4. 发明申请

US20130009273A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130009273A1
公开(公告)日：2013-01-10
申请号：US13620353
申请日：2012-09-14
申请人： Jin-A KIM , Seok-Ho Jie
发明人： Jin-A KIM , Seok-Ho Jie
IPC分类号： H01L29/02
CPC分类号： H01L27/10894 , H01L27/105 , H01L27/10852
摘要： A semiconductor device and a method for fabricating a semiconductor device are provided. The method for fabricating a semiconductor device includes forming an isolation layer over a semiconductor substrate defining first and second regions, etching the isolation layer at an edge of the first region to form a guard ring pattern, forming a buried guard ring filling the guard ring pattern, selectively etching the isolation layer of the first region to form a plurality of patterns, forming a plurality of conductive patterns in the respective patterns, and completely removing the isolation layer of the first region through a dip-out process.
摘要翻译：提供半导体器件和制造半导体器件的方法。制造半导体器件的方法包括在限定第一和第二区域的半导体衬底上形成隔离层，在第一区域的边缘蚀刻隔离层以形成保护环图案，形成填充保护环图案的掩埋保护环选择性地蚀刻第一区域的隔离层以形成多个图案，在各图案中形成多个导电图案，并且通过浸出工艺完全去除第一区域的隔离层。

5. 发明授权

US08153486B2 Method for fabricating capacitor 失效
标题翻译：制造电容器的方法
公开(公告)号：US08153486B2
公开(公告)日：2012-04-10
申请号：US12612908
申请日：2009-11-05
申请人： Seok-Ho Jie
发明人： Seok-Ho Jie
IPC分类号： H01L21/00
CPC分类号： H01G13/00 , H01L27/0207 , H01L28/91 , Y10T29/417
摘要： A method for fabricating a capacitor includes forming an etch stop layer, a first isolating insulation layer, and a floating layer over a substrate including storage node contact plugs to form a resulting substrate structure; etching the floating layer, the first isolating insulation layer, and the etch stop layer to form a plurality of open regions; forming a conductive layer over the substrate structure; forming a second isolating insulation layer over the conductive layer, the second isolating insulation layer filling upper portions of the open regions; etching portions of the remaining floating layer to form a floating pattern; performing a storage node isolation process in a manner that the floating pattern is exposed to form a plurality of storage nodes having sidewalls supported by the floating pattern; and removing the etched first isolating insulation layer.
摘要翻译：制造电容器的方法包括在包括存储节点接触插塞的衬底上形成蚀刻停止层，第一隔离绝缘层和浮动层，以形成所得到的衬底结构; 蚀刻浮置层，第一隔离绝缘层和蚀刻停止层以形成多个开放区域; 在所述衬底结构上形成导电层; 在所述导电层上形成第二隔离绝缘层，所述第二隔离绝缘层填充所述开放区域的上部; 蚀刻剩余浮动层的部分以形成浮动图案; 以浮动图案被暴露以形成具有由所述浮动图案支撑的侧壁的多个存储节点的方式执行存储节点隔离处理; 以及去除蚀刻的第一隔离绝缘层。

6. 发明申请

US20110156206A1 SEMICONDUCTOR DEVICE EMPLOYING NITRIDE FLOATING CAPACITOR (NFC) 有权
标题翻译：使用氮化物浮动电容器（NFC）的半导体器件
公开(公告)号：US20110156206A1
公开(公告)日：2011-06-30
申请号：US12829837
申请日：2010-07-02
申请人： Seok-Ho Jie
发明人： Seok-Ho Jie
IPC分类号： H01L29/92
CPC分类号： H01L28/90 , H01L27/10852 , H01L27/10894
摘要： A semiconductor device includes: a substrate configured to include cell regions and a peripheral region around the cell regions; storage nodes arranged in each of the cell regions; a first support pattern configured in each cell region to support the storage nodes; and a second support pattern configured in the peripheral region to couple first support patterns to each other.
摘要翻译：半导体器件包括：衬底，被配置为包括围绕单元区域的单元区域和周边区域; 布置在每个单元区域中的存储节点; 配置在每个单元区域中以支持所述存储节点的第一支持模式; 以及配置在所述周边区域中以将第一支撑图案彼此耦合的第二支撑图案。

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