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1. 发明专利

JP2012114422A Semiconductor device and semiconductor storage device 审中-公开
标题翻译：半导体器件和半导体存储器件
公开(公告)号：JP2012114422A
公开(公告)日：2012-06-14
申请号：JP2011238450
申请日：2011-10-31
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KATO KIYOSHI , SHIONOIRI YUTAKA , NAGATSUKA SHUHEI , YAKUBO HIROTO , KOYAMA JUN
IPC分类号： H01L21/8242 , H01L21/336 , H01L21/8247 , H01L27/10 , H01L27/108 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/1156 , G11C11/403 , G11C16/0433 , H01L21/84 , H01L27/1203 , H01L27/1225 , H01L28/40
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device or a semiconductor storage device for holding data for a longer period of time.SOLUTION: A semiconductor device comprises: a first semiconductor layer 152a including a pair of impurity regions; a second semiconductor layer 152b provided apart from the first semiconductor layer and formed of the same material as the first semiconductor layer; a first insulation layer 153 provided on the first and second semiconductor layers; a first conductive layer 154 overlapping with the first semiconductor layer via the first insulation layer 153; a third semiconductor layer 156 overlapping with the first conductive layer via the first insulation layer 153 and formed of a different material from the first semiconductor layer; a second conductive layer 157b electrically connected to the first conductive layer and the third semiconductor layer; a third conductive layer 157a electrically connected to the third semiconductor layer 156 and formed of the same material as the second conductive layer; a second insulation layer 158 provided on the third semiconductor layer, the second conductive layer, and the third conductive layer; and a fourth conductive layer 159 overlapping with the third semiconductor layer via the second insulation layer.
摘要翻译：要解决的问题：提供一种用于保持更长时间的数据的半导体器件或半导体存储器件。解决方案：半导体器件包括：包括一对杂质区的第一半导体层152a; 第二半导体层152b，与第一半导体层分开设置并由与第一半导体层相同的材料形成; 设置在第一和第二半导体层上的第一绝缘层153; 经由第一绝缘层153与第一半导体层重叠的第一导电层154; 通过第一绝缘层153与第一导电层重叠并由与第一半导体层不同的材料形成的第三半导体层156; 电连接到第一导电层和第三半导体层的第二导电层157b; 电连接到第三半导体层156并由与第二导电层相同的材料形成的第三导电层157a; 设置在第三半导体层，第二导电层和第三导电层上的第二绝缘层158; 以及经由第二绝缘层与第三半导体层重叠的第四导电层159。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2010109351A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2010109351A
公开(公告)日：2010-05-13
申请号：JP2009226638
申请日：2009-09-30
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAKUBO HIROTO
IPC分类号： H01L21/822 , G06K19/07 , G06K19/077 , H01L27/04
CPC分类号： H01L23/645 , G06K19/07749 , H01L23/60 , H01L23/642 , H01L2223/6677 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device whose reliability is improved by increasing resistance to external stress and electrostatic breakdown while achieving small thickness and miniaturization. SOLUTION: The semiconductor device includes an IC chip having an integrated circuit and a resonant capacitor 204, an antenna 201 provided on the IC chip, and a conductive shield 206 at least part of which overlaps the antenna via an insulating film. A capacitive element is formed with a multilayer structure of the antenna, the insulating film formed on the antenna, and the conductive shield provided on the insulating film. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件，其通过在实现小厚度和小型化的同时增加对外部应力和静电击穿的耐受性而提高可靠性。解决方案：半导体器件包括具有集成电路的IC芯片和谐振电容器204，设置在IC芯片上的天线201和至少一部分经由绝缘膜与天线重叠的导电屏蔽件206。电容元件形成有天线的多层结构，天线上形成的绝缘膜和设置在绝缘膜上的导电屏蔽。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2017085082A 半導体装置および電子機器审中-公开
公开(公告)号：JP2017085082A
公开(公告)日：2017-05-18
申请号：JP2016166562
申请日：2016-08-29
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd
发明人： YAMAZAKI SHUNPEI , KATO KIYOSHI , YAKUBO HIROTO , NAGATSUKA SHUHEI
IPC分类号： H01L29/786 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L21/822 , H01L21/8234 , H01L23/522 , H01L27/04 , H01L27/088
CPC分类号： H01L27/1225 , H01L23/544 , H01L27/1207 , H01L27/1259 , H01L29/66969 , H01L29/7869 , H01L2223/54453
摘要：【課題】作製工程中にESDによる損傷を生じにくい半導体装置を提供する。【解決手段】ダイシングラインと重なる位置にバンドギャップが2.5eV以上4.2eV以下、好ましくは2.7eV以上3.5eV以下の層を設ける。トランジスタなどの半導体装置の周囲にエネルギーバンドギャップが2.5eV以上4.2eV以下、好ましくは2.7eV以上3.5eV以下の層を設ける。当該層はフローティング状態でもよいし、特定の電位が供給されていてもよい。【選択図】図1

4. 发明专利

JP2013219363A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013219363A
公开(公告)日：2013-10-24
申请号：JP2013092521
申请日：2013-04-25
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KATO KIYOSHI , SHIONOIRI YUTAKA , NAGATSUKA SHUHEI , YAKUBO HIROTO , KOYAMA JUN
IPC分类号： H01L21/8242 , C23C14/08 , G11C11/405 , H01L27/10 , H01L27/108 , H01L29/786
CPC分类号： H01L27/1156 , G11C11/403 , G11C16/0433 , H01L21/84 , H01L27/1203 , H01L27/1225 , H01L28/40
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device or a semiconductor storage device which increases a data retention period.SOLUTION: A semiconductor device comprises a memory circuit including: a semiconductor layer 152a having a pair of impurity regions; a semiconductor layer 152b which is composed of the same material with the semiconductor layer 152a and distant from the semiconductor layer 152a, and which includes an impurity element; an insulation layer 153 provided on the semiconductor layer 152a and the semiconductor layer 152b; a conductive layer 154 overlapping the semiconductor layer 152a via the insulation layer 153; a semiconductor layer 156 which overlaps the conductive layer 154 via the insulation layer 153 and which is composed of a material different from that of the semiconductor layer 152a; a conductive layer 157b electrically connected to the conductive layer 154 and the semiconductor layer 156; a conductive layer 157a which is electrically connected to the semiconductor layer 156 and composed of the same material with the conductive layer 157b; an insulation layer 158 provided on the semiconductor layer 156, the conductive layer 157b and the conductive layer 157a; and a conductive layer 159 overlapping the semiconductor layer 156 via the insulation layer 158.
摘要翻译：要解决的问题：提供一种增加数据保持期的半导体器件或半导体存储器件。解决方案：半导体器件包括存储电路，其包括：具有一对杂质区域的半导体层152a; 半导体层152b，其由与半导体层152a相同且远离半导体层152a的材料构成，并且包括杂质元素; 设置在半导体层152a和半导体层152b上的绝缘层153; 经由绝缘层153与半导体层152a重叠的导电层154; 半导体层156，其经由绝缘层153与导电层154重叠，并且由与半导体层152a的材料不同的材料构成; 电连接到导电层154和半导体层156的导电层157b; 导电层157a，与导电层157b电连接到半导体层156并由相同的材料构成; 设置在半导体层156，导电层157b和导电层157a上的绝缘层158; 以及经由绝缘层158与半导体层156重叠的导电层159。

5. 发明专利

JP2013009325A Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：JP2013009325A
公开(公告)日：2013-01-10
申请号：JP2012113557
申请日：2012-05-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： NAGATSUKA SHUHEI , YAKUBO HIROTO
IPC分类号： H03K19/096 , H01L21/336 , H01L21/8242 , H01L21/8247 , H01L27/108 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792 , H03K3/356
CPC分类号： H01L27/06 , G11C11/412 , G11C14/0063 , H01L27/1052 , H01L27/1225
摘要： PROBLEM TO BE SOLVED: To reduce the power consumption of a memory device, reduce the area of the memory device, and reduce the number of transistors included in the memory device.SOLUTION: A memory device comprises: a comparator comparing potentials of a first output signal and a second output signal; a first memory portion having a first oxide semiconductor transistor and a first silicon transistor; a second memory portion having a second oxide semiconductor transistor and a second silicon transistor; and an output potential definer that defines the potentials of the first output signal and the second output signal. One of a source and a drain of the first oxide semiconductor transistor is electrically connected to a gate of the first silicon transistor. One of a source and a drain of the second oxide semiconductor transistor is electrically connected to a gate of the second silicon transistor.
摘要翻译：要解决的问题：为了降低存储器件的功耗，减小存储器件的面积，并减少存储器件中包括的晶体管的数量。存储器件包括：比较器，比较第一输出信号和第二输出信号的电位; 具有第一氧化物半导体晶体管和第一硅晶体管的第一存储器部分; 具有第二氧化物半导体晶体管和第二硅晶体管的第二存储器部分; 以及定义第一输出信号和第二输出信号的电位的输出电位定义器。第一氧化物半导体晶体管的源极和漏极之一电连接到第一硅晶体管的栅极。第二氧化物半导体晶体管的源极和漏极之一电连接到第二硅晶体管的栅极。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2012015500A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2012015500A
公开(公告)日：2012-01-19
申请号：JP2011123881
申请日：2011-06-02
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： ISOBE ATSUO , IEDA YOSHINORI , KATO KIYOSHI , YAKUBO HIROTO , HATA YUUKI
IPC分类号： H01L27/108 , G11C11/405 , H01L21/8234 , H01L21/8242 , H01L21/8247 , H01L27/08 , H01L27/088 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/10852 , G11C16/0433 , H01L27/11521 , H01L27/1156 , H01L27/1225
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device with a novel structure that can hold storage content even without power supply, and that has no limitation in the number of times of writing.SOLUTION: A semiconductor device comprises a second transistor provided on a first transistor, and a capacitive element. A gate electrode of the first transistor and a source electrode of the second transistor being in contact with the gate electrode are formed using materials that can provide an etching selection ratio between them. When the gate electrode of the first transistor and the source electrode of the second transistor are formed using materials that can provide an etching selection ratio, the layout margin can be reduced. Thus, the degree of integration of the semiconductor device can be improved.
摘要翻译：要解决的问题：为了提供即使没有电源也能够保持存储内容的新型结构的半导体器件，并且对写入次数没有限制。解决方案：半导体器件包括设置在第一晶体管上的第二晶体管和电容元件。使用可以提供它们之间的蚀刻选择比的材料来形成第一晶体管的栅电极和与栅电极接触的第二晶体管的源电极。当使用可以提供蚀刻选择比的材料来形成第一晶体管的栅电极和第二晶体管的源电极时，可以减小布局裕度。因此，可以提高半导体器件的集成度。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2012015498A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2012015498A
公开(公告)日：2012-01-19
申请号：JP2011123576
申请日：2011-06-01
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： ISOBE ATSUO , IEDA YOSHINORI , IMAI KEITAROU , KATO KIYOSHI , YAKUBO HIROTO , HATA YUUKI
IPC分类号： H01L27/108 , G11C11/405 , H01L21/8242 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/1156 , H01L27/1225 , H01L28/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device with a novel structure that can hold storage content even without power supply, and that has no limitation in the number of times of writing.SOLUTION: A semiconductor device comprises plural memory cells arranged in matrix each including a first transistor, a second transistor, and a capacitor element. Wiring (also called a bit line) for connecting one memory cell and another memory cell is electrically connected to a source region or a drain region of the first transistor via a conduction layer and a source electrode or a drain electrode of the second transistor. This can reduce the number of wiring as compared with the case where the source electrode or the drain electrode of the first transistor and the source electrode or the drain electrode of the second transistor are connected to different wiring, resulting in that the degree of integration of the semiconductor device can be improved.
摘要翻译：要解决的问题：为了提供即使没有电源也能够保持存储内容的新型结构的半导体器件，并且对写入次数没有限制。解决方案：半导体器件包括以矩阵形式布置的多个存储单元，每个存储单元包括第一晶体管，第二晶体管和电容器元件。用于连接一个存储单元和另一个存储单元的布线（也称为位线）经由第二晶体管的导电层和源电极或漏极电连接到第一晶体管的源极区或漏极区。与第一晶体管的源电极或漏电极以及第二晶体管的源极或漏极连接到不同的布线的情况相比，这可以减少布线的数量，导致可以改善半导体器件。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2013009364A Semiconductor integrated circuit 有权
公开(公告)号：JP2013009364A
公开(公告)日：2013-01-10
申请号：JP2012114385
申请日：2012-05-18
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAKUBO HIROTO , NAGATSUKA SHUHEI
IPC分类号： H03K19/096 , H01L21/822 , H01L27/04 , H01L29/786 , H03K3/356 , H03K5/08 , H03K19/0952 , H03K19/20
CPC分类号： G11C19/28 , H01L27/0688 , H01L27/11807 , H01L27/1203 , H01L27/1225 , H01L2924/0002 , H03K19/0948 , H03K19/0963 , H03K19/215 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a novel logic circuit that holds data even after power supply is blocked, and provide a novel logic circuit that can reduce power consumption.SOLUTION: A logic circuit is configured by electrically connecting a comparator that compares two output nodes, a charge holding part, and an output node potential defining part. Thus, the logic circuit that holds data even after power supply is blocked can be provided. Moreover, the total number of transistors included in the logic circuit can be reduced. Moreover, by stacking a transistor including an oxide semiconductor and a transistor including silicon, the area of the logic circuit can be reduced.

9. 发明专利

JP2011248347A Photomask 审中-公开
标题翻译：光掩模
公开(公告)号：JP2011248347A
公开(公告)日：2011-12-08
申请号：JP2011097863
申请日：2011-04-26
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： SHISHIDO HIDEAKI , YAKUBO HIROTO , OISHI HIROMASA
IPC分类号： G03F1/36 , G03F1/68
CPC分类号： G03F1/36
摘要： PROBLEM TO BE SOLVED: To provide a photomask capable of reducing roundness of a corner portion of a mask made of a resist in a photolithography step, and further to provide a method for manufacturing a semiconductor device with less variation.SOLUTION: A photomask includes an auxiliary pattern at a corner portion of a light-blocking portion, and (k+1) sides (k is a natural number of 3 or more) form k obtuse angles in the auxiliary pattern. Alternatively, a photomask includes an auxiliary pattern at a corner portion of a light-blocking portion, and the auxiliary pattern is formed by a zigzag curved line.

10. 发明专利

JP2009054145A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009054145A
公开(公告)日：2009-03-12
申请号：JP2008191272
申请日：2008-07-24
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , KOYAMA JUN , KATO KIYOSHI , KOEN TAKAAKI , YAKUBO HIROTO , YANAGISAWA MAKOTO , OTANI HISASHI , SUGIYAMA EIJI , HORIKOSHI NOZOMI
IPC分类号： G06K19/077 , G06K19/07
CPC分类号： G06K19/07735 , G06K19/07722 , G06K19/07794 , H01L23/295 , H01L23/3157 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a wireless communication function, which has high reliability against an external force, in particular, pressing force, and prevents electrostatic breakdown in an integrated circuit without interfering with reception of a radio wave. SOLUTION: The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna for transmitting a signal or power included in a received radio wave to the on-chip antenna contactlessly. The integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a conductivity of approximately 10 6 Ω/cm 2 to 10 14 Ω/cm 2 in surface resistance value is formed on at least one surface of each structure body. The conductive film can be formed either on the integrated circuit and on-chip antenna side or on the opposite side. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有无线通信功能的半导体器件，其具有相对于外力的高可靠性，特别是按压力，并且防止集成电路中的静电击穿而不干扰无线电波的接收。解决方案：半导体器件包括连接到集成电路的片上天线和用于将接收的无线电波中包括的信号或功率无接触地发送到片上天线的增强天线。集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。其中一个结构体设置在片上天线和增强天线之间。导电膜的导电率约为10 -6 / SP 2Ω/ cm 2 SP SP 2 / SP SP 2 / SP SP 表面电阻值形成在每个结构体的至少一个表面上。导电膜可以形成在集成电路和片上天线侧或相反侧上。版权所有（C）2009，JPO＆INPIT

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