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1. 发明申请

US20110111320A1 STACK STRUCTURE FOR LAMINATED SOLID OXIDE FUEL CELL, LAMINATED SOLID OXIDE FUEL CELL AND MANUFACTURING METHOD 有权
标题翻译：层压固体氧化物燃料电池堆叠结构，层压固体氧化物燃料电池和制造方法
公开(公告)号：US20110111320A1
公开(公告)日：2011-05-12
申请号：US12934471
申请日：2009-03-26
申请人： Seiichi Suda , Kaori Jono , Fumio Hashimoto , Takayuki Hashimoto
发明人： Seiichi Suda , Kaori Jono , Fumio Hashimoto , Takayuki Hashimoto
IPC分类号： H01M8/24 , H01M8/00 , H01M8/02
CPC分类号： H01M8/2432 , H01M8/0263 , H01M8/0276 , H01M8/0282 , H01M8/0286 , H01M8/2404 , H01M8/2425 , H01M8/2485 , H01M2008/1293 , Y02P70/56
摘要： A stack structure for a solid oxide fuel cell includes a plurality of stacked single cells, each having a fuel electrode layer including a fuel electrode and an air electrode layer including an air electrode, the fuel electrode layer and the air electrode layer being arranged opposite each other on either side of a solid electrolyte, separators arranged between the stacked single cells to separate the single cells, and non-porous seal parts located within the fuel electrode layer and the air electrode layer, are equivalent to either the separators or the solid electrolyte at least in terms of thermal expansion and contraction characteristics, and are integrated with an edge of the fuel electrode or an edge of the air electrode, and also with the adjacent separator and the adjacent solid electrolyte.
摘要翻译：固体氧化物型燃料电池用叠层结构体包括多个堆叠单体电池，具有包括燃料电极的燃料电极层和包括空气极的空气极层，多个燃料电极层和空气极层相对配置另一方面，在固体电解质的两侧，布置在堆叠的单个电池之间以分离单个电池的隔板和位于燃料电极层和空气电极层内的无孔密封部件等同于隔板或固体电解质至少在热膨胀和收缩特性方面，并且与燃料电极的边缘或空气电极的边缘以及与相邻的隔板和相邻的固体电解质结合。

2. 发明授权

US08658328B2 Stack structure for laminated solid oxide fuel cell, laminated solid oxide fuel cell and manufacturing method 有权
标题翻译：叠层固体氧化物燃料电池堆叠结构，层压固体氧化物燃料电池及制造方法
公开(公告)号：US08658328B2
公开(公告)日：2014-02-25
申请号：US12934471
申请日：2009-03-26
申请人： Seiichi Suda , Kaori Jono , Fumio Hashimoto , Takayuki Hashimoto
发明人： Seiichi Suda , Kaori Jono , Fumio Hashimoto , Takayuki Hashimoto
IPC分类号： H01M8/24 , H01M8/00 , H01M8/02
CPC分类号： H01M8/2432 , H01M8/0263 , H01M8/0276 , H01M8/0282 , H01M8/0286 , H01M8/2404 , H01M8/2425 , H01M8/2485 , H01M2008/1293 , Y02P70/56
摘要： A stack structure for a solid oxide fuel cell includes a plurality of stacked single cells, each having a fuel electrode layer including a fuel electrode and an air electrode layer including an air electrode, the fuel electrode layer and the air electrode layer being arranged opposite each other on either side of a solid electrolyte, separators arranged between the stacked single cells to separate the single cells, and non-porous seal parts located within the fuel electrode layer and the air electrode layer, are equivalent to either the separators or the solid electrolyte at least in terms of thermal expansion and contraction characteristics, and are integrated with an edge of the fuel electrode or an edge of the air electrode, and also with the adjacent separator and the adjacent solid electrolyte.
摘要翻译：固体氧化物型燃料电池用叠层结构体包括多个堆叠单体电池，具有包括燃料电极的燃料电极层和包括空气极的空气极层，多个燃料电极层和空气极层相对配置另一方面，在固体电解质的两侧，布置在堆叠的单个电池之间以分离单个电池的隔板和位于燃料电极层和空气电极层内的无孔密封部件等同于隔板或固体电解质至少在热膨胀和收缩特性方面，并且与燃料电极的边缘或空气电极的边缘以及与相邻的隔板和相邻的固体电解质结合。

3. 发明授权

US09082213B2 Image processing apparatus for combining real object and virtual object and processing method therefor 有权
标题翻译：用于组合真实对象和虚拟对象的图像处理装置及其处理方法
公开(公告)号：US09082213B2
公开(公告)日：2015-07-14
申请号：US12265546
申请日：2008-11-05
申请人： Masakazu Fujiki , Kaname Tomite , Yasuo Katano , Takayuki Hashimoto
发明人： Masakazu Fujiki , Kaname Tomite , Yasuo Katano , Takayuki Hashimoto
IPC分类号： G06T7/00 , G06T19/00 , G06T15/06
CPC分类号： G06T19/006 , G06T15/06
摘要： When an image in a virtual space in which a virtual object is arranged is generated using a ray tracing method, and when it is determined that a ray which is generated in accordance with the ray tracing method successively intersected an approximate virtual object such as a hand which is a real object at lest twice, an image corresponding to a first intersection is generated in accordance with the ray emitted to the first intersection.
摘要翻译：当使用光线跟踪方法生成虚拟对象的虚拟空间中的图像时，并且当确定根据光线跟踪方法生成的射线相继地与诸如手的近似虚拟对象相交根据发射到第一交叉点的射线，生成与第一交点相对应的图像，其为实际对象两次，

4. 发明申请

US20120273893A1 SEMICONDUCTOR DEVICE AND POWER SUPPLY DEVICE USING THE SAME 有权
公开(公告)号：US20120273893A1
公开(公告)日：2012-11-01
申请号：US13548265
申请日：2012-07-13
申请人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
发明人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
IPC分类号： H01L27/088
CPC分类号： H01L25/16 , H01L25/074 , H01L2224/05554 , H01L2224/0603 , H01L2224/40245 , H01L2224/48091 , H01L2224/48137 , H01L2224/4903 , H01L2224/49175 , H01L2924/00014 , H01L2924/12032 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.

5. 发明授权

US07782098B2 Drive circuit and inverter for voltage driving type semiconductor device 有权
标题翻译：用于电压驱动型半导体器件的驱动电路和逆变器
公开(公告)号：US07782098B2
公开(公告)日：2010-08-24
申请号：US12170472
申请日：2008-07-10
申请人： Takayuki Hashimoto , Takashi Hirao , Masaki Shiraishi
发明人： Takayuki Hashimoto , Takashi Hirao , Masaki Shiraishi
IPC分类号： H03K3/00
CPC分类号： H02M3/07 , H02M1/08 , H02M7/5387 , H02M2003/071
摘要： A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected to the positive side of the DC power supply; a fourth switch connected to the other terminal of the third switch; a fifth switch connected to the other terminal of the fourth switch and to the negative side of the DC power supply; and a capacitor connected to the other terminal of the first switch and to the other terminal of the fourth switch. A gate of the semiconductor element is connected to the other terminal of said third switch; and a source of the semiconductor element is connected to the negative side of the DC power supply.
摘要翻译：用于驱动半导体元件的驱动电路配备有：连接到直流电源的正侧的第一开关; 连接到第一开关的另一个端子和直流电源的负极的第二开关; 连接到直流电源的正极的第三开关; 连接到第三开关的另一个端子的第四开关; 连接到第四开关的另一个端子和直流电源的负极的第五开关; 以及电容器，连接到第一开关的另一端子和第四开关的另一端子。半导体元件的栅极连接到所述第三开关的另一个端子; 并且半导体元件的源极连接到直流电源的负极侧。

6. 发明授权

US07687885B2 Semiconductor device with reduced parasitic inductance 有权
标题翻译：降低寄生电感的半导体器件
公开(公告)号：US07687885B2
公开(公告)日：2010-03-30
申请号：US11809023
申请日：2007-05-30
申请人： Takayuki Hashimoto , Noboru Akiyama , Masaki Shiraishi , Tetsuya Kawashima
发明人： Takayuki Hashimoto , Noboru Akiyama , Masaki Shiraishi , Tetsuya Kawashima
IPC分类号： H01L31/111 , G05F1/10 , H02J3/12 , H01L25/04 , H01L25/18 , G06F1/26 , H02M3/155
CPC分类号： H01L25/16 , G06F1/26 , H01L24/48 , H01L24/49 , H01L2224/0603 , H01L2224/40 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.
摘要翻译：本发明提供一种降低电源单元的主电路的寄生电感的技术。在具有用于高侧开关的功率MOSFET和低侧开关的功率MOSFET串联的电路的非绝缘DC-DC转换器中，用于高侧开关的功率MOSFET和用于低侧开关的功率MOSFET是由n沟道垂直MOSFETS形成，并且用于高侧开关的功率MOSFET的源极和用于低侧开关的功率MOSFET的漏电极经由相同的管芯焊盘电连接。

7. 发明授权

US07480163B2 Semiconductor device and power supply device using the same 有权
标题翻译：半导体装置及使用该装置的电源装置
公开(公告)号：US07480163B2
公开(公告)日：2009-01-20
申请号：US11585226
申请日：2006-10-24
申请人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
发明人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
IPC分类号： H02M1/00
CPC分类号： H01L25/16 , H01L25/074 , H01L2224/05554 , H01L2224/0603 , H01L2224/40245 , H01L2224/48091 , H01L2224/48137 , H01L2224/4903 , H01L2224/49175 , H01L2924/00014 , H01L2924/12032 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
摘要翻译：提供能够减小电感的半导体器件。在其中将整流MOSFET，换向MOSFET和驱动这些MOSFET的驱动IC安装在一个封装上的半导体器件中，整流MOSFET，金属板和换向MOSFET被层压。主电路的电流从封装的后表面流向其前表面。金属板通过封装中的布线连接到输出端子。引线键合用于连接驱动IC，整流MOSFET和换向MOSFET，所有端子都放置在同一平面上。因此，电感变小，电源损耗和尖峰电压也降低。

8. 发明申请

US20080217684A1 Semiconductor device and manufacturing method thereof and power supply apparatus using the same 审中-公开
标题翻译：半导体装置及其制造方法以及使用其的电源装置
公开(公告)号：US20080217684A1
公开(公告)日：2008-09-11
申请号：US12011286
申请日：2008-01-25
申请人： Takayuki Hashimoto , Takashi Hirao , Masaki Shiraishi
发明人： Takayuki Hashimoto , Takashi Hirao , Masaki Shiraishi
IPC分类号： H01L27/088 , H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/823437 , H01L21/823487 , H01L27/088 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/66727 , H01L29/66734
摘要： A semiconductor device comprises a trench-gate type field-effect transistor on a semiconductor substrate having a first main surface and a second main surface oppositely positioned in a thickness direction, wherein the trench-gate type field-effect transistor comprises a first semiconductor region at the first main surface side; a second semiconductor region at the second main surface; a semiconductor well region between the first semiconductor region and the second semiconductor region; a trench formed so as to protrude in a first direction intersecting the second main surface; a gate electrode formed on an inner surface of the trench via a gate insulating film, and a bottom of the gate electrode is in the first semiconductor region, and a well bottom has a well deep portion and a well shallow portion, and the well deep portion is in a region more distant from the gate insulating film compared to the well shallow portion.
摘要翻译：半导体器件包括在半导体衬底上的沟槽栅型场效应晶体管，其具有在厚度方向上相对定位的第一主表面和第二主表面，其中沟槽栅型场效应晶体管包括第一半导体区，第一主表面; 在第二主表面处的第二半导体区域; 在所述第一半导体区域和所述第二半导体区域之间的半导体阱区域; 形成为沿与第二主表面相交的第一方向突出的沟槽; 经由栅极绝缘膜形成在沟槽的内表面上的栅极电极和栅电极的底部位于第一半导体区域中，阱底部具有阱深部和浅部，阱深与较浅的部分相比，部分位于比栅极绝缘膜更远的区域。

9. 发明授权

US5710440A Semiconductor light emitting element with In GaAlP active layer of specified thickness 失效
标题翻译：具有规定厚度的InGaAlP有源层的半导体发光元件
公开(公告)号：US5710440A
公开(公告)日：1998-01-20
申请号：US600295
申请日：1996-02-12
申请人： Hiroaki Okagawa , Takayuki Hashimoto , Keiji Miyashita , Tomoo Yamada , Kazuyuki Tadatomo
发明人： Hiroaki Okagawa , Takayuki Hashimoto , Keiji Miyashita , Tomoo Yamada , Kazuyuki Tadatomo
IPC分类号： H01L33/14 , H01L33/30 , H01L33/40 , H01L33/00
CPC分类号： H01L33/30 , H01L33/14 , H01L33/305
摘要： A semiconductor light emitting element comprising an n-type semiconductor substrate and a light emitting part comprising an n-type cladding layer composed of an InGaAlP compound semiconductor material, an active layer and a p-type cladding layer formed in that order from the substrate side by double heterojunction, wherein said semiconductor light emitting element satisfies at least one of the following conditions: A. the thickness of said active layer being greater than 0.75 .mu.m and not more than 1.5 .mu.m, and B. the thickness of said p-type cladding layer being 0.5 .mu.m-2.0 .mu.m. According to the light emitting element of the present invention, an overflow of electron into the p-type cladding layer can be suppressed by setting the thickness of the active layer and the p-type cladding layer to fall within the above-mentioned specific ranges, as a result of which the element shows luminous efficiency peaked within the specified range.
摘要翻译：一种半导体发光元件，包括n型半导体衬底和发光部分，所述发光部分包括由InGaAlP化合物半导体材料，有源层和p型覆层组成的n型覆层，所述n型覆盖层从衬底侧依次形成通过双异质结，其中所述半导体发光元件满足以下条件中的至少一个：A.所述有源层的厚度大于0.75μm且不大于1.5μm，并且B.所述p- 型包层为0.5μm-2.0μm。根据本发明的发光元件，通过将有源层和p型覆盖层的厚度设定在上述特定范围内，可以抑制电子向p型覆层的溢出，结果，该元件显示在特定范围内达到峰值的发光效率。

10. 发明申请

US20140334212A1 Semiconductor Device and Power Converter 有权
标题翻译：半导体器件和电源转换器
公开(公告)号：US20140334212A1
公开(公告)日：2014-11-13
申请号：US14364959
申请日：2011-12-15
申请人： Takayuki Hashimoto , Mutsuhiro Mori
发明人： Takayuki Hashimoto , Mutsuhiro Mori
IPC分类号： H01L29/739 , H01L29/10 , H02M7/537 , H01L29/88
CPC分类号： H01L29/7397 , H01L27/0727 , H01L29/0834 , H01L29/1095 , H01L29/7395 , H01L29/861 , H01L29/88 , H02M7/537
摘要： A semiconductor device of this invention (an IGBT with a built-in diode) includes: an n−-type drift layer 1; a p-type channel region 2 that is arranged in contact with the surface side of this n−-type drift layer 1; a gate electrode 5 that is provided in a trench T provided so as to penetrate this p-type channel region 2 and reach to the n−-type drift layer 1 through a gate insulating film 3; an n-type source region 4 that is provided so as to contact the trench T on the surface side of the p-type channel region 2; a high-concentration n-type region 6 that is arranged in contact with the back side of the n−-type drift layer 1; and a high-concentration p-type region 7 that is arranged in contact with the back side of this high-concentration n-type region 6; in which a junction of the high-concentration n-type region 6 and the high-concentration p-type region 7 is a tunnel junction. According to this semiconductor device, it is possible to form the IGBT and the diode on a single chip. Moreover, it is possible to avoid problems of “snap back” and “current concentration.”
摘要翻译：本发明的半导体器件（具有内置二极管的IGBT）包括：n型漂移层1; 与该n型漂移层1的表面侧接触的p型沟道区域2; 设置在沟槽T中以设置成穿过该p型沟道区域2并通过栅极绝缘膜3到达n型漂移层1的栅电极5; n型源极区域4，其设置成与p型沟道区域2的表面侧的沟槽T接触; 配置成与n型漂移层1的背面接触的高浓度n型区域6; 以及与该高浓度n型区域6的背面接触的高浓度p型区域7; 其中高浓度n型区域6和高浓度p型区域7的结是隧道结。根据该半导体器件，可以在单个芯片上形成IGBT和二极管。此外，可以避免“回弹”和“当前集中”的问题。

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