会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Method and apparatus for generating an analog signal having a pre-determined pattern
    • 用于产生具有预定模式的模拟信号的方法和装置
    • US08009073B2
    • 2011-08-30
    • US12689066
    • 2010-01-18
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03M1/66
    • H04L25/0272H03M1/661H03M1/742H04L25/03834
    • A circuit configured to generate an analog signal having a pre-determined pattern. The circuit includes a plurality of digital-to-analog converters. Each of the plurality of digital-to-analog converters includes a plurality of current sources configured to generate a plurality of square waveforms and a summer configured to sum the plurality of square waveforms to generate the analog signal having the pre-determined pattern. Each square waveform is delayed by a pre-determined amount delay relative to another square waveform of the plurality of square waveforms. The pre-determined amount of delay between each square waveform of the plurality of waveforms is adjustable to adjust the pre-determined pattern of the analog signal. The pre-determined amount of delay is non-uniform throughout the circuit.
    • 一种被配置为产生具有预定模式的模拟信号的电路。 电路包括多个数模转换器。 多个数模转换器中的每一个包括被配置为产生多个方波的多个电流源和加法器,其被配置为对多个方波进行求和以产生具有预定模式的模拟信号。 相对于多个平方波形中的另一方波形,每个方波被延迟预定量的延迟。 多个波形的每个方波之间的预定量的延迟是可调节的,以调整模拟信号的预定模式。 在整个电路中,预定量的延迟是不均匀的。
    • 2. 发明授权
    • Dual ported network physical layer
    • 双端口网络物理层
    • US07889752B2
    • 2011-02-15
    • US11857238
    • 2007-09-18
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H04L12/56
    • H03K17/005H03K17/693
    • A switching physical layer (PHY) device comprises a first termination network, a switching transmitter, and a switching receiver. The first termination network communicates with a first network connector. The switching transmitter includes first and second outputs, which communicate with the first termination network and a second termination network, respectively. The switching transmitter selectively outputs a transmit signal to a selected one of the first and second termination networks based on a control signal. The switching receiver includes first and second inputs, which communicate with the first and second termination networks, respectively. The switching receiver receives a receive signal from the selected one of the first and second termination networks.
    • 交换物理层(PHY)设备包括第一终端网络,交换发射机和切换接收机。 第一终端网络与第一网络连接器通信。 切换发射机包括分别与第一终端网络和第二终端网络通信的第一和第二输出。 开关发射器基于控制信号选择性地向第一和第二终端网络中的一个输出发射信号。 切换接收机包括分别与第一和第二终端网络通信的第一和第二输入。 切换接收器从所选择的第一和第二终端网络接收接收信号。
    • 3. 再颁专利
    • Class B driver
    • B类司机
    • USRE41831E1
    • 2010-10-19
    • US11284395
    • 2005-11-21
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03M1/66
    • H03K5/01H03M1/0881H03M1/68H03M1/742
    • A communication circuit, Ethernet controller card, and method comprises K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two; K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals; and wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1.
    • 通信电路,以太网控制器卡和方法包括K个数模转换器,每个转换器接收相应的数字控制信号,并且每个提供相应的模拟控制信号,其中K至少为2; K个电压 - 电流转换器,每个转换器根据相应的模拟控制信号中的相应一个提供相应的双电平发射信号分量; 并且其中K个电压 - 电流转换器中的每一个的相应双电平发射信号分量被组合以产生J电平发射信号,其中J = K + 1。
    • 4. 发明授权
    • Active resistance summer for a transformer hybrid
    • 变压器混合动态电阻夏季
    • US07606547B1
    • 2009-10-20
    • US09920240
    • 2001-08-01
    • Pierte RooSehat Sutardja
    • Pierte RooSehat Sutardja
    • H04B1/10H04B3/20H04B1/38
    • H04L1/0041H04B1/581H04B3/23H04B3/32
    • An electrical circuit in a communications channel includes a first sub-circuit having a first input which receives a composite signal that includes a transmission signal component and a receive signal component, a second input which receives a replica transmission signal, a third input which receives an analog baseline correction current, and an output which provides a receive signal which comprises the composite signal minus the replica signal. A second sub-circuit for controls the analog baseline correction current, so that the magnitude of the composite signal does not exceed a predetermined value of an operating parameter of the electrical circuit. The composite signal, the replica transmission signal, and the analog baseline correction current are directly connected together at a common node of the first sub-circuit.
    • 通信信道中的电路包括具有第一输入的第一子电路,该第一输入端接收包括发送信号分量和接收信号分量的复合信号,接收复制发送信号的第二输入端,接收复制信号的第三输入端 模拟基线校正电流,以及提供包括复合信号减去副本信号的接收信号的输出。 用于控制模拟基准线校正电流的第二子电路,使得复合信号的幅度不超过电路的工作参数的预定值。 复合信号,复制传输信号和模拟基线校正电流在第一子电路的公共节点处直接连接在一起。
    • 6. 发明授权
    • Communication driver
    • 通讯驱动
    • US07649483B1
    • 2010-01-19
    • US12004200
    • 2007-12-20
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03M1/66
    • H04L25/0272H03M1/661H03M1/742H04L25/03834
    • A circuit includes T sets of digital to analog converters (DACs), each including N current sources and M delay elements. An output signal includes a sum of outputs of the N current sources. An input of a first one of the M delay elements and a control input of a first one of the N current sources receive a respective one of a plurality of decoded signals. T sets of first converters each have a feedback node, an output, and an input that communicates with the output signal of a respective one of the T sets of DACs. T second converters have inputs that communicate with respective ones of the feedback nodes of each of the T sets of first converters. A summer generates a difference signal that is based on the outputs of the T sets of first converters and outputs of the T second converters.
    • 电路包括T组数模转换器(DAC),每组包括N个电流源和M个延迟元件。 输出信号包括N个电流源的输出之和。 M个延迟元件中的第一个的输入和N个电流源中的第一个的控制输入接收多个解码信号中的相应的一个。 T组第一转换器各自具有反馈节点,输出和与所述T组中的相应一个DAC的输出信号通信的输入。 T第二转换器具有与T组第一转换器中的每一个的各反馈节点通信的输入。 夏天产生基于T组第一转换器的输出和T秒转换器的输出的差分信号。
    • 7. 发明授权
    • Communication driver
    • 通讯驱动
    • US07280060B1
    • 2007-10-09
    • US10972143
    • 2004-10-25
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03M1/66
    • H03M1/661
    • An Ethernet controller includes a plurality of sets of digital-to-analog converters (DACs). Each DAC receives an input signal and provides an output signal. Each of the plurality of sets of DACs includes a plurality of sets of replica current circuits. Each DAC includes current sources. Each current source includes a respective control input. The output signal provided by each DAC includes a sum of outputs of the current sources. Each DAC also includes delay elements. An input of a first one of the delay elements receives the input signal. An mth one of the delay elements includes an input in communication with an m-1th one of the delay elements. An output of one of the delay elements controls a corresponding control input of one of the current sources. A sum of each output signal from a respective one of the plurality of sets of DACs forms an accumulated output signal.
    • 以太网控制器包括多组数模转换器(DAC)。 每个DAC接收输入信号并提供输出信号。 多组DAC中的每一组包括多组复制电流电路。 每个DAC包括电流源。 每个电流源包括相应的控制输入。 由每个DAC提供的输出信号包括电流源的输出总和。 每个DAC还包括延迟元件。 延迟元件中的第一个的输入接收输入信号。 延迟元件中的第m个包括与第m-1个延迟元件通信的输入。 一个延迟元件的输出控制一个电流源的相应控制输入。 来自多组DAC中的相应一组的每个输出信号的和形成累积的输出信号。
    • 8. 发明授权
    • Communication driver
    • 通讯驱动
    • US07113121B1
    • 2006-09-26
    • US11178350
    • 2005-07-12
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03M1/66
    • H03M1/747
    • An Ethernet controller includes a decoder, and T sets of transmit circuits. Each set of transmit circuits receives one of T decoded signals from the decoder, and includes a digital-to-analog converter (DAC) that provides a transmit output signal, and a replica circuit that provides a replica output signal. Each DAC includes N current sources arranged in parallel and differentially, and M delay elements. Each current source includes a control input. A sum of outputs of the N current sources forms each transmit output signal. An input of the first delay element and the control input of the first current source receive a decoded signal. An input of an mth delay element is in communication with an output of an m−1th delay element. The output of each delay element controls a corresponding control input of a current source. A sum of the transmit output signals forms an accumulated output signal.
    • 以太网控制器包括解码器和T组发送电路。 每组发送电路从解码器接收T个解码信号之一,并且包括提供发送输出信号的数模转换器(DAC)和提供复制输出信号的复制电路。 每个DAC包括并联和差分布置的N个电流源和M个延迟元件。 每个电流源包括一个控制输入。 N个电流源的输出的总和形成每个发送输出信号。 第一延迟元件的输入和第一电流源的控制输入接收解码信号。 第m延迟元件的输入与第m-1个延迟元件的输出通信。 每个延迟元件的输出控制当前源的相应控制输入。 发送输出信号的和形成累积的输出信号。
    • 9. 发明授权
    • Class B driver
    • B类司机
    • US06844837B1
    • 2005-01-18
    • US10191924
    • 2002-07-08
    • Sehat SutardjaPierte Roo
    • Sehat SutardjaPierte Roo
    • H03K5/01H03M1/66
    • H03K5/01H03M3/504H04B1/581H04B3/23H04B3/32
    • A communication circuit, Ethernet controller card, and method comprises K digital-to-analog converters each receiving a corresponding digital control signal and each providing a corresponding analog control signal, wherein K is at least two; K voltage-to-current converters each providing a corresponding bi-level transmit signal component in accordance with a respective one of the corresponding analog control signals; and wherein the corresponding bi-level transmit signal components of each of the K voltage-to-current converters are combined to produce a J-level transmit signal, wherein J=K+1.
    • 通信电路,以太网控制器卡和方法包括K个数模转换器,每个转换器接收相应的数字控制信号,并且每个提供相应的模拟控制信号,其中K至少为2; K个电压 - 电流转换器,每个转换器根据相应的模拟控制信号中的相应一个提供相应的双电平发射信号分量; 并且其中K个电压 - 电流转换器中的每一个的相应双电平发射信号分量被组合以产生J电平发射信号,其中J = K + 1。