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1. 发明申请

US20050259465A1 Nonvolatile memory apparatus 审中-公开
标题翻译：非易失存储器
公开(公告)号：US20050259465A1
公开(公告)日：2005-11-24
申请号：US11128289
申请日：2005-05-13
申请人： Satoshi Yoshida , Kunihiro Katayama , Shinsuke Asari
发明人： Satoshi Yoshida , Kunihiro Katayama , Shinsuke Asari
IPC分类号： G06F21/24 , G06F12/00 , G06F12/14 , G06K19/073 , G09C1/00 , G11C16/04 , G11C29/00
CPC分类号： G06F12/1408 , G11C29/78
摘要： In technology for enabling the replacement of part of an operating program of a controller by a modified program on a nonvolatile memory, the present invention prevents tampering and leak of storage information within the nonvolatile memory and the controller. At power-on reset, an encrypted alternative program, if present, is transferred from a nonvolatile memory to a volatile memory, and decrypted when actually executed. A long wait is not required until data processing by a data processor is enabled after the exit from the reset processing. Since the alternative program once decrypted is held in the volatile memory so as to be reusable, it does not need to be decrypted each time it is executed. Since the alternative program is encrypted, even if the nonvolatile memory is physically separated from the controller to illegally dump the alternative program, it is difficult to analyze the data.
摘要翻译：本发明在非易失性存储器中通过修改程序使控制器的一部分操作程序更换的技术中，防止非易失性存储器和控制器内存储信息的篡改和泄露。在上电复位时，加密的替代程序（如果存在）从非易失性存储器传输到易失性存储器，并在实际执行时进行解密。在复位处理退出后，数据处理器的数据处理才能进行长时间的等待。由于一旦解密的替代程序被保存在易失性存储器中以便可重用，因此在每次执行时不需要被解密。由于替代程序被加密，即使非易失性存储器在物理上与控制器分离以非法地转储替代程序，因此难以分析数据。

2. 发明授权

US07370168B2 Memory card conforming to a multiple operation standards 有权
标题翻译：存储卡符合多种操作标准
公开(公告)号：US07370168B2
公开(公告)日：2008-05-06
申请号：US10811898
申请日：2004-03-30
申请人： Motoki Kanamori , Kunihiro Katayama , Yasuhiro Nakamura , Satoshi Yoshida , Shinsuke Asari
发明人： Motoki Kanamori , Kunihiro Katayama , Yasuhiro Nakamura , Satoshi Yoshida , Shinsuke Asari
IPC分类号： G06F12/00
CPC分类号： G11C7/1045 , G06K19/077 , G06K19/07732 , G11C16/102 , G11C29/02 , G11C29/022 , G11C29/028 , G11C29/50012
摘要： The invention intends to provide a memory card conforming to an HS-MMC mode in a standard of a multimedia card, while securing compatibility of both standards of the multimedia card and an SD card. In a normal MMC mode, the data is outputted at a fall edge of a clock signal. A frequency of the clock signal is about 20 MHz. When the data is outputted at the fall edge of the clock signal, data output is in time for a next clock signal. When a parameter ‘1’ is set to a timing register provided in a host interface, the memory card is transitioned into the HS-MMC mode. In the HS-MMC mode, a clock signal frequency is increased to about 52 MHz. Here, the data is outputted at the rise edge of the clock signal, whereby the data output is brought in time for the rise edge of the next clock signal.
摘要翻译：本发明旨在提供符合多媒体卡标准中的HS-MMC模式的存储卡，同时确保多媒体卡的标准和SD卡的兼容性。在正常的MMC模式中，数据在时钟信号的下降沿输出。时钟信号的频率约为20MHz。当在时钟信号的下降沿输出数据时，下一个时钟信号的数据输出是及时的。当将参数'1'设置为主机接口中提供的定时寄存器时，存储卡被转换到HS-MMC模式。在HS-MMC模式下，时钟信号频率增加到大约52MHz。这里，在时钟信号的上升沿输出数据，从而数据输出及时输出到下一个时钟信号的上升沿。

3. 发明授权

US07418602B2 Memory card 失效
标题翻译：存储卡
公开(公告)号：US07418602B2
公开(公告)日：2008-08-26
申请号：US10868960
申请日：2004-06-17
申请人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
发明人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
IPC分类号： G06F21/00
CPC分类号： G06F21/78 , G06F21/31 , G06F2221/2143
摘要： In order to protect the user security data, provided is a memory card capable of preventing the data leakage to a third party not having the access authority by imposing the limitation on the number of password authentications and automatically erasing the data. In a system comprised of a multimedia card and a host machine electrically connected to the multimedia card and controlling the operations of the multimedia card, a retry counter for storing the number of password authentication failures is provided and the upper limit of the number of failures is registered in a register. When passwords are repeatedly entered once, twice, . . . and n times and the retry counter which counts the entries reaches the upper limit of the number of failures, the data is automatically erased so as not to leave the data in the flash memory.
摘要翻译：为了保护用户安全数据，提供了一种能够通过对密码认证数量进行限制并自动擦除数据来防止数据泄漏给不具有访问权限的第三方的存储卡。在由多媒体卡和与多媒体卡电连接并控制多媒体卡的操作的主机构成的系统中，提供用于存储密码认证失败次数的重试计数器，故障次数的上限为注册登记。当密码重复输入一次，两次，。。。并且n次，对条目进行计数的重试计数器达到故障次数的上限，数据被自动擦除，以便不将数据留在闪存中。

4. 发明申请

US20080301817A1 MEMORY CARD 有权
标题翻译：存储卡
公开(公告)号：US20080301817A1
公开(公告)日：2008-12-04
申请号：US12182123
申请日：2008-07-29
申请人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehire , Masaharu Ukeda
发明人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehire , Masaharu Ukeda
IPC分类号： G06F21/00
CPC分类号： G06F21/78 , G06F21/31 , G06F2221/2143
摘要： In order to protect the user security data, provided is a memory card capable of preventing the data leakage to a third party not having the access authority by imposing the limitation on the number of password authentications and automatically erasing the data. In a system comprised of a multimedia card and a host machine electrically connected to the multimedia card and controlling the operations of the multimedia card, a retry counter for storing the number of password authentication failures is provided and the upper limit of the number of failures is registered in a register. When passwords are repeatedly entered once, twice, . . . and n times and the retry counter which counts the entries reaches the upper limit of the number of failures, the data is automatically erased so as not to leave the data in the flash memory.
摘要翻译：为了保护用户安全数据，提供了一种能够通过对密码认证数量进行限制并自动擦除数据来防止数据泄漏给不具有访问权限的第三方的存储卡。在由多媒体卡和与多媒体卡电连接并控制多媒体卡的操作的主机构成的系统中，提供用于存储密码认证失败次数的重试计数器，故障次数的上限为注册登记。当密码重复输入一次，两次，。。。并且n次，对条目进行计数的重试计数器达到故障次数的上限，数据被自动擦除，以便不将数据留在闪存中。

5. 发明授权

US07996911B2 Memory card 有权
标题翻译：存储卡
公开(公告)号：US07996911B2
公开(公告)日：2011-08-09
申请号：US12182123
申请日：2008-07-29
申请人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
发明人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
IPC分类号： G06F7/04
CPC分类号： G06F21/78 , G06F21/31 , G06F2221/2143
摘要： In order to protect the user security data, provided is a memory card capable of preventing the data leakage to a third party not having the access authority by imposing the limitation on the number of password authentications and automatically erasing the data. In a system comprised of a multimedia card and a host machine electrically connected to the multimedia card and controlling the operations of the multimedia card, a retry counter for storing the number of password authentication failures is provided and the upper limit of the number of failures is registered in a register. When passwords are repeatedly entered once, twice, . . . and n times and the retry counter which counts the entries reaches the upper limit of the number of failures, the data is automatically erased so as not to leave the data in the flash memory.
摘要翻译：为了保护用户安全数据，提供了一种能够通过对密码认证数量进行限制并自动擦除数据来防止数据泄漏给不具有访问权限的第三方的存储卡。在由多媒体卡和与多媒体卡电连接并控制多媒体卡的操作的主机构成的系统中，提供用于存储密码认证失败次数的重试计数器，故障次数的上限为注册登记。当密码重复输入一次，两次，。。。并且n次，对条目进行计数的重试计数器达到故障次数的上限，数据被自动擦除，以便不将数据留在闪存中。

6. 发明申请

US20050005131A1 Memory card 失效
标题翻译：存储卡
公开(公告)号：US20050005131A1
公开(公告)日：2005-01-06
申请号：US10868960
申请日：2004-06-17
申请人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
发明人： Satoshi Yoshida , Kunihiro Katayama , Akira Kanehira , Masaharu Ukeda
IPC分类号： G06F12/14 , G06F21/00 , G06K19/073 , H04K1/00
CPC分类号： G06F21/78 , G06F21/31 , G06F2221/2143
摘要： In order to protect the user security data, provided is a memory card capable of preventing the data leakage to a third party not having the access authority by imposing the limitation on the number of password authentications and automatically erasing the data. In a system comprised of a multimedia card and a host machine electrically connected to the multimedia card and controlling the operations of the multimedia card, a retry counter for storing the number of password authentication failures is provided and the upper limit of the number of failures is registered in a register. When passwords are repeatedly entered once, twice, . . . and n times and the retry counter which counts the entries reaches the upper limit of the number of failures, the data is automatically erased so as not to leave the data in the flash memory.
摘要翻译：为了保护用户安全数据，提供了一种能够通过对密码认证数量进行限制并自动擦除数据来防止数据泄漏给不具有访问权限的第三方的存储卡。在由多媒体卡和与多媒体卡电连接并控制多媒体卡的操作的主机构成的系统中，提供用于存储密码认证失败次数的重试计数器，故障次数的上限为注册登记。当密码重复输入一次，两次，。。。并且n次，对条目进行计数的重试计数器达到故障次数的上限，数据被自动擦除，以便不将数据留在闪存中。

7. 发明授权

US08503235B2 Nonvolatile memory with faulty cell registration 失效
标题翻译：具有故障单元注册的非易失性存储器
公开(公告)号：US08503235B2
公开(公告)日：2013-08-06
申请号：US13298548
申请日：2011-11-17
申请人： Kunihiro Katayama , Takayuki Tamura , Satoshi Watatani , Kiyoshi Inoue , Shigemasa Shiota , Masashi Naito
发明人： Kunihiro Katayama , Takayuki Tamura , Satoshi Watatani , Kiyoshi Inoue , Shigemasa Shiota , Masashi Naito
IPC分类号： G11C11/34 , G11C11/29
CPC分类号： G11C16/349 , G11C29/76 , G11C29/88
摘要： In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
摘要翻译：响应于由用于访问存储在所述非易失性半导体存储器中的多个数据块的系统接口单元接收到的读取命令，控制器对来自非易失性半导体存储器的两个存储器执行数据块的选择性读取操作。所述控制器还执行数据的并行操作，所述数据传输已经经过错误校正单元的错误检测和纠错操作的第一数据块经由所述系统接口单元从所述两个存储器之一传送到主机系统，并且将要进行错误检测和纠错操作的第二数据块的数据传输从所述非易失性半导体存储器传输到两个存储器中的另一个。

8. 发明授权

US08331153B2 Semiconductor memory having electrically erasable and programmable semiconductor memory cells 有权
标题翻译：具有电可擦除和可编程的半导体存储器单元的半导体存储器
公开(公告)号：US08331153B2
公开(公告)日：2012-12-11
申请号：US13363400
申请日：2012-02-01
申请人： Kunihiro Katayama , Takayuki Tamura , Kiyoshi Inoue
发明人： Kunihiro Katayama , Takayuki Tamura , Kiyoshi Inoue
IPC分类号： G11C16/04
CPC分类号： G11C16/28 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/30 , G11C2211/5621 , G11C2211/5632 , G11C2211/5634 , G11C2211/5641 , G11C2211/5642
摘要： In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.
摘要翻译：在非易失性存储装置中，系统总线接收地址，命令和/或控制信号。存储单元通过将阈值电压移位到多个范围之一来存储数据位。在写入第一页时，第一存储器单元的阈值电压保持在第一范围或者移位到第二范围。在写第二页时，阈值电压保持在第一或第二电压中，或者从第二范围移动到从第一范围到第四范围的第三范围。在写入第二页之前，存储器从第一存储器单元读取用于生成第二页写入数据的数据。从第一到第二范围的阈值电压的移动方向与从第一到第三范围的移动方向相同。

9. 发明申请

US20100177579A1 SEMICONDUCTOR MEMORY DEVICE HAVING FAULTY CELLS 有权
标题翻译：具有故障细胞的半导体存储器件
公开(公告)号：US20100177579A1
公开(公告)日：2010-07-15
申请号：US12615502
申请日：2009-11-10
申请人： Kunihiro Katayama , Takayuki Tamura , Satoshi Watatani , Kiyoshi Inoue , Shigemasa Shiota , Masashi Naito
发明人： Kunihiro Katayama , Takayuki Tamura , Satoshi Watatani , Kiyoshi Inoue , Shigemasa Shiota , Masashi Naito
IPC分类号： G11C29/04
CPC分类号： G11C16/349 , G11C29/76 , G11C29/88
摘要： In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
摘要翻译：响应于由用于访问存储在所述非易失性半导体存储器中的多个数据块的系统接口单元接收到的读取命令，控制器对来自非易失性半导体存储器的两个存储器执行数据块的选择性读取操作。所述控制器还执行数据的并行操作，所述数据传输已经经过错误校正单元的错误检测和纠错操作的第一数据块经由所述系统接口单元从所述两个存储器之一传送到主机系统，并且将要进行错误检测和纠错操作的第二数据块的数据传输从所述非易失性半导体存储器传输到两个存储器中的另一个。

10. 发明授权

US07570515B2 Semiconductor memory having electrically erasable and programmable semiconductor memory cells 失效
标题翻译：具有电可擦除和可编程的半导体存储器单元的半导体存储器
公开(公告)号：US07570515B2
公开(公告)日：2009-08-04
申请号：US11870196
申请日：2007-10-10
申请人： Kunihiro Katayama , Takayuki Tamura , Kiyoshi Inoue
发明人： Kunihiro Katayama , Takayuki Tamura , Kiyoshi Inoue
IPC分类号： G11C16/04
CPC分类号： G11C16/28 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/30 , G11C2211/5621 , G11C2211/5632 , G11C2211/5634 , G11C2211/5641 , G11C2211/5642
摘要： An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.
摘要翻译：一种可电气可变的非易失性多级存储器件和操作这种器件的方法，其包括将至少一个存储器单元的状态设置为从包括至少第一至第四电平状态的多个状态中选择的一种状态响应于要存储在一个存储器单元中的信息，并且通过利用在第二和第二电平状态之间设置的第一参考电平来读取存储单元的状态来确定读出状态是否对应于第一至第四电平状态之一第三电平状态，在第一和第二电平状态之间设置的第二参考电平和在第三和第四电平状态之间设置的第三参考电平。

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