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1. 发明授权

US06528337B1 Process of producing semiconductor layer structure 有权
标题翻译：制造半导体层结构的工艺
公开(公告)号：US06528337B1
公开(公告)日：2003-03-04
申请号：US09544982
申请日：2000-04-07
申请人： Satoshi Arakawa , Toshikazu Mukaihara , Nobumitsu Yamanaka , Akihiko Kasukawa
发明人： Satoshi Arakawa , Toshikazu Mukaihara , Nobumitsu Yamanaka , Akihiko Kasukawa
IPC分类号： H01L2100
CPC分类号： B82Y20/00 , H01L33/06 , H01S5/2275 , H01S5/34306 , H01S5/3434 , H01S5/4043 , H01S5/4087
摘要： Disclosed is a process of producing a semiconductor layer structure which emits lights with a plurality of luminescence wavelengths from the same quantum well structure. The layer structure has a layer structure which has the quantum well structure located between a lower light-confinement layer and an upper light-confinement layer. At least a part of the quantum well structure is an area which has a shorter luminescence wavelength than those of the other portions. This area is produced by stacking a lower cladding layer, the lower light-confinement layer, the quantum well structure, the upper light-confinement layer and a first semiconductor layer having a first conductivity type on a semiconductor substrate by epitaxial growth and further stacking a second semiconductor layer having the opposite conductivity type to that of the first semiconductor layer on the entire surface or a partial surface of the first semiconductor layer. This second semiconductor layer may be removed after the formation.
摘要翻译：公开了一种从相同的量子阱结构产生发射具有多个发光波长的光的半导体层结构的方法。层结构具有层结构，其具有位于下限光层和上光限制层之间的量子阱结构。量子阱结构的至少一部分是具有比其它部分更短的发光波长的区域。该区域是通过外延生长在半导体衬底上堆叠下包层，下光限制层，量子阱结构，上光限制层和具有第一导电类型的第一半导体层，并进一步堆叠第二半导体层与第一半导体层的整个表面或第一半导体层的部分表面具有相反的导电类型。该第二半导体层可以在形成之后被去除。

2. 发明授权

US06278139B1 Semiconductor light-emitting diode 有权
标题翻译：半导体发光二极管
公开(公告)号：US06278139B1
公开(公告)日：2001-08-21
申请号：US09402757
申请日：2000-06-09
申请人： Takuya Ishikawa , Satoshi Arakawa , Toshikazu Mukaihara , Akihiko Kasukawa
发明人： Takuya Ishikawa , Satoshi Arakawa , Toshikazu Mukaihara , Akihiko Kasukawa
IPC分类号： H01L3300
CPC分类号： H01L33/44 , H01L33/14 , H01L33/30 , H01L33/305 , H01L33/36 , H01L33/38
摘要： A semiconductor light emitting diode (10) is formed on an n-type GaAs substrate and includes: an AlGaInP based double heterojunction structure in which an active layer (16) is sandwiched between cladding layers (14, 18); an upper P-type contact layer 20; and a ring-shaped upper electrode (22) having an opening (28), wherein light is emitted through the upper p-type contact layer (20) and the opening (28) of the upper electrode (22). The upper p-type contact layer (20) is a semiconductor layer made of AlGaAs or AlGaAsP having an Al content of 0.5 or more, and doped with impurities at a carrier concentration of 5×1018 cm−3 or more. The semiconductor light emitting diode emits light in a desired emission pattern and at higher intensities, and is capable of being fabricated by relatively simple processes.
摘要翻译：半导体发光二极管（10）形成在n型GaAs衬底上，包括：AlGaInP基双异质结结构，其中有源层（16）夹在包层（14,18）之间; 上P型接触层20; 以及具有开口（28）的环形上电极（22），其中通过上电极（22）的上p型接触层（20）和开口（28）发射光。上部p型接触层（20）是Al含量为0.5以上的AlGaAs或AlGaAsP的半导体层，掺杂了载流子浓度为5×10 18 cm -3以上的杂质。半导体发光二极管以期望的发射模式和较高的强度发光，并能够通过相对简单的工艺制造。

3. 发明授权

US06911713B2 Optical device having a carrier-depleted layer 失效
标题翻译：具有载流子耗尽层的光学器件
公开(公告)号：US06911713B2
公开(公告)日：2005-06-28
申请号：US10617661
申请日：2003-07-14
申请人： Nariaki Ikeda , Takeharu Yamaguchi , Satoshi Arakawa , Nobumitsu Yamanaka , Akihiko Kasukawa , Ryusuke Nakasaki
发明人： Nariaki Ikeda , Takeharu Yamaguchi , Satoshi Arakawa , Nobumitsu Yamanaka , Akihiko Kasukawa , Ryusuke Nakasaki
IPC分类号： G02F1/017 , H01S5/026 , H01S5/12 , H01S5/22 , H01S5/34 , H01S5/343 , H01L31/00
CPC分类号： B82Y20/00 , H01S5/0265 , H01S5/12 , H01S5/2222 , H01S5/2224 , H01S5/2226 , H01S5/3072 , H01S5/3409 , H01S5/34306
摘要： An EA-DFB module including a DFB laser diode and an EA modulator formed on an InP first-conductivity-type substrate has a mesa stripe, a current blocking structure formed on both side surfaces of the mesa strip and a second InP cladding layer formed on top of the mesa stripe and the current blocking structure. The current blocking structure includes a Fe-doped semi-insulating film, a first conductivity-type buried layer and a carrier-depleted layer. The carrier-depleted layer reduces the parasitic capacitance at the boundary between the first-conductivity-type buried layer and the second InP cladding layer.
摘要翻译：包括形成在InP第一导电型基板上的DFB激光二极管和EA调制器的EA-DFB模块具有台面条状，形成在台面条的两侧表面上的电流阻挡结构和形成在第一导电型基板上的第二InP包层台面条纹和当前阻挡结构的顶部。电流阻挡结构包括掺杂Fe的半绝缘膜，第一导电型掩埋层和载流子耗尽层。载流子耗尽层降低了第一导电型掩埋层和第二InP包覆层之间的边界处的寄生电容。

4. 发明授权

US5757833A Semiconductor laser having a transparent light emitting section, and a process of producing the same 失效
标题翻译：具有透明发光部的半导体激光器及其制造方法
公开(公告)号：US5757833A
公开(公告)日：1998-05-26
申请号：US742866
申请日：1996-11-01
申请人： Satoshi Arakawa , Norihiro Iwai , Takuya Ishikawa , Akihiko Kasukawa , Michio Ohkubo , Takao Ninomiya
发明人： Satoshi Arakawa , Norihiro Iwai , Takuya Ishikawa , Akihiko Kasukawa , Michio Ohkubo , Takao Ninomiya
IPC分类号： H01S5/16 , H01S5/227 , H01S5/343 , H01S3/19 , H01L21/20
CPC分类号： B82Y20/00 , H01S5/164 , H01S5/343 , H01S2302/00 , H01S5/2272 , H01S5/34306 , H01S5/34313
摘要： A semiconductor laser is produced by forming a laser activation section and a light emitting section having an InGaAsP layer as a quantum well on a GaAs substrate according to metal organic chemical vapor deposition by using a selective area growth mask, in such a manner that the laser activation section and the light emitting section have different film thicknesses. The laser activation section includes a laser activation layer whose oscillation wavelength is set to 0.8 to 1.1 .mu.m, and the light emitting section includes an optical waveguide layer having a broader forbidden band than the laser activation layer.
摘要翻译：通过使用选择性区域生长掩模，通过使用选择性区域生长掩模，通过在GaAs衬底上形成激光激活部分和具有InGaAsP层作为量子阱的发光部分来制造半导体激光器，激光器激活部分和发光部分具有不同的膜厚度。激光激活部包括振荡波长设定为0.8〜1.1μm的激光激活层，发光部具有比激光活化层更宽的禁带宽度的光波导层。

5. 发明授权

US06603138B2 Quantum-confinement stark effect optical modulator 有权
标题翻译：量子限制效应光调制器
公开(公告)号：US06603138B2
公开(公告)日：2003-08-05
申请号：US09791439
申请日：2001-02-21
申请人： Satoshi Arakawa , Akihiko Kasukawa
发明人： Satoshi Arakawa , Akihiko Kasukawa
IPC分类号： H01L2906
CPC分类号： H01S5/0265 , H01S5/22 , H01S5/2215 , H01S5/222
摘要： A quantum confinement Stark effect (QCSE) optical modulator has a ridge stripe including a current confinement structure. The current confinement structure includes an AlInAs layer which is subjected to selective oxidation of Al content in the AlInAs layer. The current confinement structure is such that a pair of Al-oxidized regions of the AlInAs layer sandwiches therebetween a central un-oxidized region.
摘要翻译：量子限制斯塔克效应（QCSE）光调制器具有包括电流限制结构的脊状条纹。电流限制结构包括在AlInAs层中经受Al含量的选择性氧化的AlInAs层。电流限制结构使得AlInAs层的一对Al氧化区域夹在中间未氧化区域之间。

6. 发明申请

US20110110840A1 METHOD FOR PRODUCING GROUP III-NITRIDE CRYSTAL AND GROUP III-NITRIDE CRYSTAL 审中-公开
标题翻译：生产III族氮化物晶体和III族氮化物晶体的方法
公开(公告)号：US20110110840A1
公开(公告)日：2011-05-12
申请号：US13054373
申请日：2009-06-26
申请人： Michimasa Miyanaga , Naho Mizuhara , Keisuke Tanizaki , Issei Satoh , Hideaki Nakahata , Satoshi Arakawa , Yoshiyuki Yamamoto , Takashi Sakurada
发明人： Michimasa Miyanaga , Naho Mizuhara , Keisuke Tanizaki , Issei Satoh , Hideaki Nakahata , Satoshi Arakawa , Yoshiyuki Yamamoto , Takashi Sakurada
IPC分类号： C30B29/40 , C30B23/02 , C30B23/06 , C01B21/06
CPC分类号： C30B29/403 , C30B23/025 , C30B25/18
摘要： A method for producing a group III-nitride crystal having a large thickness and high quality and a group III-nitride crystal are provided. A method for producing a group III-nitride crystal 13 includes the following steps: A underlying substrate 11 having a major surface 11a tilted toward the direction with respect to the (0001) plane is prepared. The group III-nitride crystal 13 is grown by vapor-phase epitaxy on the major surface 11a of the underlying substrate 11. The major surface 11a of the underlying substrate 11 is preferably a plane tilted at an angle of −5° to 5° from the {01-10} plane.
摘要翻译：提供了具有大厚度和高质量的III族氮化物晶体和III族氮化物晶体的制造方法。制备III族氮化物晶体13的方法包括以下步骤：制备具有相对于（0001）面朝向<1-100>方向倾斜的主表面11a的下面的基底11。 III族氮化物晶体13通过在下面的基底11的主表面11a上的气相外延生长。下面的基底11的主表面11a优选是以-5°至5°的角度倾斜的平面 {01-10}飞机。

7. 发明申请

US20100120231A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20100120231A1
公开(公告)日：2010-05-13
申请号：US12529073
申请日：2009-02-12
申请人： Hiroyuki Kitabayashi , Koji Katayama , Satoshi Arakawa
发明人： Hiroyuki Kitabayashi , Koji Katayama , Satoshi Arakawa
IPC分类号： H01L21/20 , H01L21/28
CPC分类号： H01L21/3081 , H01S5/0425 , H01S5/2086
摘要： A method for manufacturing a semiconductor device according to the present invention includes the following step: a step (S10) of forming a GaN-based semiconductor layer, a step (S20) of forming an Al film on the GaN-based semiconductor layer, a step (S30, S40) of forming a mask layer composed of a material having a lower etching rate than that of the material constituting the Al film, a step (S50) of partially removing the Al film and the GaN-based semiconductor layer using the mask layer as a mask to form a ridge portion, a step (S60) of retracting the positions of the side walls at the ends of the Al film from the positions of the side walls of the mask layer, a step (S70) of forming a protection film composed of a material having a lower etching rate than that of the material constituting the Al film on the side surfaces of the ridge portion and on the upper surface of the mask layer, and a step (S80) of removing the Al film to remove the mask layer and the protection film formed on the upper surface of the mask layer.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：形成GaN基半导体层的步骤（S10），在GaN基半导体层上形成Al膜的步骤（S20），形成由具有比构成Al膜的材料的蚀刻速率低的材料构成的掩模层的步骤（S30，S40）;使用该步骤（S50）部分地除去Al膜和GaN基半导体层掩模层作为掩模以形成脊部;步骤（S60），从掩模层的侧壁的位置缩回Al膜的端部处的侧壁的位置，形成步骤（S70）由掩模层的侧表面和掩模层的上表面上的蚀刻速率低于构成Al膜的材料的蚀刻速率低的材料形成的保护膜，以及除去Al膜的步骤（S80）以去除掩模层和形成的保护膜 n掩模层的上表面。

8. 发明申请

US20090127664A1 GROUP III NITRIDE SEMICONDUCTOR CRYSTAL GROWING METHOD, GROUP III NITRIDE SEMICONDUCTOR CRYSTAL SUBSTRATE FABRICATION METHOD, AND GROUP III NITRIDE SEMICONDUCTOR CRYSTAL SUBSTRATE 审中-公开
标题翻译：第III组氮化物半导体晶体生长方法，第III族氮化物半导体晶体基板制造方法和III族氮化物半导体晶体基板
公开(公告)号：US20090127664A1
公开(公告)日：2009-05-21
申请号：US12273179
申请日：2008-11-18
申请人： Takuji OKAHISA , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
发明人： Takuji OKAHISA , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
IPC分类号： H01L31/20 , H01L29/20
CPC分类号： H01L21/02576 , H01L21/0237 , H01L21/02389 , H01L21/02433 , H01L21/0254 , H01L21/0262
摘要： A growing method of a group III nitride semiconductor crystal includes the steps of preparing an underlying substrate, and growing a first group III nitride semiconductor crystal doped with silicon by using silicon tetrachloride (SiCl4) gas as doping gas, on the underlying substrate by vapor phase growth. The growth rate of the first group III nitride semiconductor crystal is at least 200 μm/h and not more than 2000 μm/h.
摘要翻译： III族氮化物半导体晶体的生长方法包括以下步骤：制备下面的衬底，并且通过使用四氯化硅（SiCl 4）气体作为掺杂气体来生长掺杂有硅的第一III族氮化物半导体晶体，通过气相生长在下面的衬底上成长。第一III族氮化物半导体晶体的生长速率为至少200μm/ h且不超过2000μm/ h。

9. 发明申请

US20090127663A1 GROUP III NITRIDE SEMICONDUCTOR CRYSTAL GROWING METHOD, GROUP III NITRIDE SEMICONDUCTOR CRYSTAL SUBSTRATE FABRICATION METHOD, AND GROUP III NITRIDE SEMICONDUCTOR CRYSTAL SUBSTRATE 审中-公开
标题翻译：第III组氮化物半导体晶体生长方法，第III族氮化物半导体晶体基板制造方法和III族氮化物半导体晶体基板
公开(公告)号：US20090127663A1
公开(公告)日：2009-05-21
申请号：US12273137
申请日：2008-11-18
申请人： Takuji Okahisa , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
发明人： Takuji Okahisa , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
IPC分类号： H01L29/20 , H01L21/322
CPC分类号： H01L21/02576 , H01L21/0237 , H01L21/02389 , H01L21/02433 , H01L21/0254 , H01L21/0262
摘要： A growing method of a group III nitride semiconductor crystal includes the steps of preparing an underlying substrate, and growing a group III nitride semiconductor crystal doped with silicon by using silicon tetrafluoride gas as doping gas, on the underlying substrate by vapor phase growth.
摘要翻译： III族氮化物半导体晶体的生长方法包括以下步骤：通过使用四氟化硅气体作为掺杂气体，通过气相生长在底层衬底上生长掺杂有硅的III族氮化物半导体晶体。

10. 发明申请

US20090127662A1 GROUP III NITRIDE SEMICONDUCTOR CRYSTAL SUBSTRATE AND SEMICONDUCTOR DEVICE 有权
标题翻译： III类氮化物半导体晶体基板和半导体器件
公开(公告)号：US20090127662A1
公开(公告)日：2009-05-21
申请号：US12273101
申请日：2008-11-18
申请人： Takuji Okahisa , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
发明人： Takuji Okahisa , Tomohiro Kawase , Tomoki Uemura , Muneyuki Nishioka , Satoshi Arakawa
IPC分类号： H01L29/20
CPC分类号： H01L29/2003 , C30B25/02 , C30B29/403
摘要： A group III nitride semiconductor crystal substrate has a diameter of at least 25 mm and not more than 160 mm. The resistivity of the group III nitride semiconductor crystal substrate is at least 1×10−4 Ω·m and not more than 0.1 Ω·cm. The resistivity distribution in the diameter direction of the group III nitride semiconductor crystal is at least −30% and not more than 30%. The resistivity distribution in the thickness direction of the group III nitride semiconductor crystal is at least −16% and not more than 16%.
摘要翻译： III族氮化物半导体晶体基板的直径为至少25mm且不大于160mm。 III族氮化物半导体晶体衬底的电阻率至少为1×10 -4Ω·cm且不大于0.1Ω·cm。 III族氮化物半导体晶体的直径方向的电阻率分布为-30％以上且30％以下。 III族氮化物半导体晶体的厚度方向的电阻率分布为〜16％以上且16％以下。

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