专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06075267A Split-gate non-volatile semiconductor memory device 失效
标题翻译：分闸非易失性半导体存储器件
公开(公告)号：US06075267A
公开(公告)日：2000-06-13
申请号：US806447
申请日：1997-02-26
申请人： Satoru Taji , Hiroaki Nakanishi
发明人： Satoru Taji , Hiroaki Nakanishi
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L27/115
摘要： A non-volatile semiconductor memory device includes a substrate and a continuously formed drain diffusion layer and a continuously formed source diffusion layer which are alternately arranged within the substrate. Floating gates are disposed via a tunnel insulating film on the substrate so that they are adjacent to the drain diffusion layer. The floating gates are opposed to each other with the drain diffusion layer therebetween, and spaced away from the source diffusion layer. A control gate extends in a direction orthogonal with a direction in which the source and drain diffusion layers extend, the control gate being formed on the floating gates and the substrate via an insulating film. A select channel is provided between the floating gate closest to the source diffusion layer and the source diffusion layer. A thick insulating film is provided between the drain diffusion layer and the control gate between the floating gates which are opposed to each other with the drain diffusion layer therebetween.
摘要翻译：非易失性半导体存储器件包括基板和连续形成的漏极扩散层和连续形成的源极扩散层，其交替地布置在基板内。浮动栅极通过衬底上的隧道绝缘膜设置，使得它们与漏极扩散层相邻。浮置栅极彼此相对，其间具有漏极扩散层，并且与源极扩散层间隔开。控制栅极在与源极和漏极扩散层延伸的方向正交的方向上延伸，控制栅极通过绝缘膜形成在浮动栅极和衬底上。在最靠近源极扩散层的浮置栅极和源极扩散层之间提供选择沟道。在漏极扩散层和控制栅极之间的漏极扩散层之间彼此相对的浮置栅极之间设置厚的绝缘膜。

2. 发明授权

US5966325A Semiconductor memory device with improved read speed 失效
标题翻译：半导体存储器件具有改进的读取速度
公开(公告)号：US5966325A
公开(公告)日：1999-10-12
申请号：US31001
申请日：1998-02-26
申请人： Hiroaki Nakanishi , Satoru Taji
发明人： Hiroaki Nakanishi , Satoru Taji
IPC分类号： G11C16/02 , G11C16/04 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792 , G11C13/00
CPC分类号： H01L27/11519 , G11C16/0433 , H01L27/115
摘要： A memory cell of a memory device is constructed such that a source diffusion layer is divided into blocks each containing 16 word lines, and such that a drain diffusion layer is not divided. Each segment of the source diffusion layer is connected to a metal bit line via a block selection MOS transistor. The metal bit line is formed on an insulating film provided on the source diffusion layer so as to be parallel with the source diffusion layer. The block selection MOS transistor is connected to the metal bit line via a contact hole. A gate electrode of the block selection MOS transistor is formed of a polysilicon film for providing a selection gate used to form a word line of the memory cell. A source diffusion layer and a drain diffusion layer of the block selection MOS transistor are formed of the same material as the source diffusion layer of the memory cell and the drain diffusion layer of the memory cell.
摘要翻译：存储器件的存储单元被构造成使得源极扩散层被分成包含16个字线的块，并且使得漏极扩散层不被划分。源极扩散层的每个段通过块选择MOS晶体管连接到金属位线。金属位线形成在设置在源极扩散层上的绝缘膜上，以与源极扩散层平行。块选择MOS晶体管经由接触孔与金属位线连接。块选择MOS晶体管的栅电极由多晶硅膜形成，用于提供用于形成存储单元的字线的选择栅极。块选择MOS晶体管的源极扩散层和漏极扩散层由与存储单元的源极扩散层和存储单元的漏极扩散层相同的材料形成。

3. 发明授权

US08491776B2 Flow cell, apparatus for concentrating radioactive fluoride anion, and method of concentrating radioactive fluoride anion 有权
标题翻译：流动池，浓缩放射性氟化物阴离子的装置，以及浓缩放射性氟化物阴离子的方法
公开(公告)号：US08491776B2
公开(公告)日：2013-07-23
申请号：US12674001
申请日：2007-08-31
申请人： Hiroaki Nakanishi , Satoshi Konishi , Keisuke Naka
发明人： Hiroaki Nakanishi , Satoshi Konishi , Keisuke Naka
IPC分类号： G01N30/00 , G01N30/26 , G01N30/88
CPC分类号： G21G4/00 , B01D59/42 , G21G1/001 , G21G2001/0015 , Y10T156/10
摘要： A flowcell 2 is constituted of insulating substrates 2a and 2b. The two substrates 2a and 2b have been directly bonded to each other by a bonding method for attaining tenacious bonding, for example, anodic bonding or hydrofluoric acid bonding. A channel 6 has been formed at the interface between the substrates 2a and 2b. Part of the substrate 2a which faces the channel 6 has a carbon electrode 4a formed thereon by sintering a pasty carbon material, the electrode 4a extending along the channel 6. On the other hand, the substrate 2b has a groove 6a serving as the channel 6, and has an electrode 4b made of a metal film formed on a bottom surface of the groove 6a.
摘要翻译：流通池2由绝缘基板2a和2b构成。两个基板2a和2b已经通过用于实现顽固结合的接合方法彼此直接接合，例如阳极接合或氢氟酸粘合。在基板2a和2b之间的界面处形成通道6。面向通道6的基板2a的一部分通过烧结糊状碳材料而形成在其上的碳电极4a，电极4a沿通道6延伸。另一方面，基板2b具有用作通道6的槽6a 并且具有由形成在凹槽6a的底表面上的金属膜制成的电极4b。

4. 发明授权

US06759644B2 Sensor using radiation pulses 有权
标题翻译：传感器使用辐射脉冲
公开(公告)号：US06759644B2
公开(公告)日：2004-07-06
申请号：US10100225
申请日：2002-03-14
申请人： Susumu Mizuhara , Arata Nakamura , Hiroaki Nakanishi
发明人： Susumu Mizuhara , Arata Nakamura , Hiroaki Nakanishi
IPC分类号： H01J4014
CPC分类号： G01J1/44 , G01S7/493 , G01S7/527
摘要： A sensor has an emitting device for emitting radiation pulses repeatedly and a receiving device for receiving these pulses. The receiving device includes a converter such as a photoelectric converter to convert the received radiation pulses into electrical pulses. On the basis of a known waveform characteristic or characteristics of true electrical pulse it is judged if a pulse which appears on the output line of the converter is a true electrical pulse caused by receiving the radiation pulse emitted from the emitting device or a false electrical pulse caused by noise. The result of this judgment is outputted from an output device. The emitting device may serve to emit the pulses according to a specified bit pattern and the receiving device may serve to compare the pattern of received pulses with a standard bit pattern and to thereby distinguish between true and false electrical pulses.
摘要翻译：传感器具有用于重复发射辐射脉冲的发射装置和用于接收这些脉冲的接收装置。接收装置包括诸如光电转换器的转换器，以将接收到的辐射脉冲转换成电脉冲。基于已知的波形特性或真电脉冲的特性，判断出现在转换器的输出线上的脉冲是否是由接收从发射装置发射的辐射脉冲或假电脉冲引起的真电脉冲造成噪音该判断结果从输出装置输出。发射装置可以用于根据指定的位模式发射脉冲，并且接收装置可以用于将接收的脉冲的模式与标准位模式进行比较，从而区分真假电脉冲。

5. 发明授权

US06717129B1 Photoelectric sensor using radiation pulses 有权
标题翻译：光电传感器使用辐射脉冲
公开(公告)号：US06717129B1
公开(公告)日：2004-04-06
申请号：US10617570
申请日：2003-07-11
申请人： Susumu Mizuhara , Arata Nakamura , Hiroaki Nakanishi
发明人： Susumu Mizuhara , Arata Nakamura , Hiroaki Nakanishi
IPC分类号： H01J4014
CPC分类号： G01S17/026 , G01S7/487 , H03K17/941
摘要： A photoelectric sensor has an emitting device for emitting radiation pulses repeatedly and a receiving device for receiving these pulses. The receiving device includes a converter such as a photoelectric converter to convert the received radiation pulses into electrical pulses. On the basis of a known waveform characteristic or characteristics of true electrical pulse it is judged if a pulse which appears on the output line of the converter is a true electrical pulse caused by receiving the radiation pulse emitted from the emitting device or a false electrical pulse caused by noise. The result of this judgment is outputted from an output device. The emitting device may serve to emit the pulses according to a specified bit pattern and the receiving device may serve to compare the pattern of received pulses simultaneously with two or more standard bit patterns and to thereby distinguish between true and false electrical pulses.
摘要翻译：光电传感器具有重复发射辐射脉冲的发射装置和用于接收这些脉冲的接收装置。接收装置包括诸如光电转换器的转换器，以将接收到的辐射脉冲转换成电脉冲。基于已知的波形特性或真电脉冲的特性，判断出现在转换器的输出线上的脉冲是否是由接收从发射装置发射的辐射脉冲或假电脉冲引起的真电脉冲造成噪音该判断结果从输出装置输出。发射装置可以用于根据指定的位模式发射脉冲，并且接收装置可以用于将接收到的脉冲的模式与两个或更多个标准位模式同时比较，从而区分真实和错误的电脉冲。

6. 发明授权

US5859977A System for software update in manner based on processing properties of devices via maintenance network while allowing data transmission between devices on another network 失效
标题翻译：基于通过维护网络的设备的处理属性的方式进行软件更新的系统，同时允许在另一网络上的设备之间的数据传输
公开(公告)号：US5859977A
公开(公告)日：1999-01-12
申请号：US453338
申请日：1995-05-30
申请人： Shuji Nishiyama , Hiroaki Nakanishi , Hideki Sato , Hiroshi Kobayashi , Shigeru Endo , Toshimasa Saika , Teruyasu Nakahashi , Hiroyuki Hori , Tomohito Ebina , Keiichi Sannomiya , Shimako Tanno
发明人： Shuji Nishiyama , Hiroaki Nakanishi , Hideki Sato , Hiroshi Kobayashi , Shigeru Endo , Toshimasa Saika , Teruyasu Nakahashi , Hiroyuki Hori , Tomohito Ebina , Keiichi Sannomiya , Shimako Tanno
IPC分类号： G06F9/06 , G06F9/44 , G06F9/445 , G06F15/00 , G06F15/163
CPC分类号： G06F8/65 , G06F8/67 , G06F8/71
摘要： A computer system is so configured as to be divided into a control system which should have high reliability and high responsiveness and an information system which does not access the control system. They are connected via a transmission path (transmission path of control system and transmission path of information system). Centralized management of development and maintenance is performed from a software maintenance system. In development and maintenance of software, management according to the feature of each software such as processing contents of each software, demanded reliability, and version up frequency is performed from a maintenance system for exclusive use by using a transmission path of information system. Thereby, development and maintenance having high reliability and expandability is realized.
摘要翻译：计算机系统被配置为被分成应具有高可靠性和高响应性的控制系统以及不访问控制系统的信息系统。它们通过传输路径（控制系统的传输路径和信息系统的传输路径）连接。开发和维护的集中管理由软件维护系统执行。在开发和维护软件中，通过使用信息系统的传输路径，从专用的维护系统执行根据每个软件的功能的管理，例如每个软件的处理内容，要求的可靠性和版本的升级频率。从而实现了具有高可靠性和可扩展性的开发和维护。

7. 发明授权

US5519875A Distributed processing system for modules, each having modularized objects 失效
标题翻译：模块分布式处理系统，每个都有模块化的对象
公开(公告)号：US5519875A
公开(公告)日：1996-05-21
申请号：US926519
申请日：1992-08-10
申请人： Takanori Yokoyama , Masaru Shimada , Tadashi Kamiwaki , Masahiko Saito , Yoshiki Kobayashi , Hiroaki Nakanishi
发明人： Takanori Yokoyama , Masaru Shimada , Tadashi Kamiwaki , Masahiko Saito , Yoshiki Kobayashi , Hiroaki Nakanishi
IPC分类号： G06F9/46 , G06F15/16
CPC分类号： G06F9/546 , G06F9/465
摘要： A distributed processing system capable of realizing efficient management of a multiplicity of objects in a large scale distributed processing comprises an objectification unit which makes it possible to handle an assembly of objects as one object and a message transfer unit by which a request for a processing to one object provided by objectification by the objectification unit is made to an optimal one of plural objects subjected to objectification.
摘要翻译：能够实现大规模分散处理中的多个对象的有效管理的分散处理系统包括：对象化单元，其可以将对象的组合作为一个对象和消息传送单元来处理，通过对象化单元的对象化提供的一个对象被做成经过客观化的多个对象中的最佳一个。

8. 发明授权

US4839846A Apparatus for performing floating point arithmetic operations and rounding the result thereof 失效
标题翻译：用于执行浮点算术运算并舍入其结果的装置
公开(公告)号：US4839846A
公开(公告)日：1989-06-13
申请号：US838941
申请日：1986-03-12
申请人： Kenji Hirose , Tadaaki Bandoh , Hidekazu Matsumoto , Shinichiro Yamaguchi , Hirokazu Hirayama , Hiroaki Nakanishi
发明人： Kenji Hirose , Tadaaki Bandoh , Hidekazu Matsumoto , Shinichiro Yamaguchi , Hirokazu Hirayama , Hiroaki Nakanishi
IPC分类号： G06F7/00 , G06F7/38 , G06F7/485 , G06F7/50 , G06F7/508 , G06F7/76
CPC分类号： G06F7/485 , G06F7/49936 , G06F7/49957
摘要： An operation unit capable of performing round processing at a high speed in a floating point operation. A circuit for detecting an overflow on the condition of a signal representing all 1's in an output of a mantissa shifter and a signal representing round-up, a carry look-ahead circuit and a circuit for generating a round precision signal are provided. When the overflow takes place, the mantissa is produced as "1". The operation unit is compatible to single, double and extended precisions recommended by Institute of Electrical and Electronic Engineers (IEEE).
摘要翻译：能够在浮点运算中高速进行圆形处理的运算部。提供一种用于在一个代表全局的输出中表示全部1的信号和表示四舍五入的信号，进位查找电路和用于产生圆形精度信号的电路的条件下检测溢出的电路。当溢出发生时，尾数产生为“1”。操作单元兼容电气和电子工程师协会（IEEE）推荐的单，双和扩展精度。

9. 发明授权

US4811269A Bit slice multiplication circuit 失效
标题翻译：位片倍增电路
公开(公告)号：US4811269A
公开(公告)日：1989-03-07
申请号：US916695
申请日：1986-10-08
申请人： Kenji Hirose , Tadaaki Bandoh , Hidekazu Matsumoto , Shinichiro Yamaguchi , Hirokazu Hirayama , Hiroaki Nakanishi
发明人： Kenji Hirose , Tadaaki Bandoh , Hidekazu Matsumoto , Shinichiro Yamaguchi , Hirokazu Hirayama , Hiroaki Nakanishi
IPC分类号： G06F7/487 , G06F7/506 , G06F7/508 , G06F7/52 , G06F7/527 , G06F7/53
CPC分类号： G06F7/5324 , G06F2207/3896
摘要： A bit slice multiplication circuit operating to slice a multiplier, produce products for the sliced multipliers and a multiplicand and sum the products to obtain the multiplication result. The circuit includes a slicing unit for slicing the multiplicand, multiplying units corresponding in number to the number of sliced multiplicands, and adding units provided in correspondence to the multiplying units and implementing summation for multiplication results from corresponding multiplying units while shifting the sliced portions of the multiplicand at each multiplying operation for sliced multipliers and multiplicands by the multiplying units, the multiplication result being obtained by summing all summation results produced by the adding units.
摘要翻译：一个用于切片乘法器的位片倍增电路，为分片乘法器产生乘积，并对乘积求和，得到乘法结果。该电路包括一个限幅单元，用于对被乘数进行分片，对应的乘法单元数目与分片被乘数的数目相对应，并且与乘法单元对应地设置的加法单位，并对相应的乘法单元进行相乘结果的求和，通过乘法单元在分片乘法器和被乘数的乘法运算中被乘数，乘法结果是通过将由加法单元产生的所有求和结果求和来获得的。

10. 发明授权

US4783731A Multicomputer system having dual common memories 失效
标题翻译：具有双公共存储器的多计算机系统
公开(公告)号：US4783731A
公开(公告)日：1988-11-08
申请号：US030266
申请日：1987-03-24
申请人： Yoshihiro Miyazaki , Jushi Ide , Takeshi Kato , Hiroaki Nakanishi , Tadaaki Bandoh
发明人： Yoshihiro Miyazaki , Jushi Ide , Takeshi Kato , Hiroaki Nakanishi , Tadaaki Bandoh
IPC分类号： G06F12/16 , G06F9/46 , G06F11/36 , G06F12/14 , G06F15/16 , G06F15/167 , G06F15/177 , G06F13/00
CPC分类号： G06F11/3648 , G06F9/468
摘要： A multicomputer system having dual common memories in which specified address areas are set within the common memories. The specified address areas are accessible irrespective of whether a CPU is in an online mode or a debug mode, while any area other than the specified address areas is accessible only when the function mode of the common memory is in agreement with the access mode of the CPU. In correspondence with each CPU, addresses to be used by the CPU are divided into a plurality of groups of addresses, and the access modes are set for the respective address groups.
摘要翻译：具有双公共存储器的多计算机系统，其中在公共存储器内设置指定的地址区域。无论CPU处于在线模式还是调试模式，指定的地址区都可以访问，而只有当公用存储器的功能模式与访问模式一致时，除指定地址区域之外的任何区域才可访问中央处理器。对应于每个CPU，由CPU使用的地址被划分为多组地址，并且为各个地址组设置访问模式。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式