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    • 1. 发明授权
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US07619911B2
    • 2009-11-17
    • US10579911
    • 2003-11-21
    • Satoru HanzawaJunji ShigetaShinichiro KimuraTakeshi SakataRiichiro TakemuraKazuhiko Kajigaya
    • Satoru HanzawaJunji ShigetaShinichiro KimuraTakeshi SakataRiichiro TakemuraKazuhiko Kajigaya
    • G11C15/00
    • G11C15/04G11C15/043
    • In a memory array structured of memory cells using a storage circuit STC and a comparator CP, either one electrode of a source electrode or a drain electrode of a transistor, whose gate electrode is connected to a search line, of a plurality of transistors structuring the comparator CP is connected to a match line HMLr precharged to a high voltage. Further, a match detector MDr is arranged on a match line LMLr precharged to a low voltage to discriminate a comparison signal voltage generated at the match line according to the comparison result of data. According to such memory array structure and operation, comparison operation can be performed at low power and at high speed while influence of search-line noise is avoided in a match line pair. Therefore, a low power content addressable memory which allows search operation at high speed can be realized.
    • 在使用存储电路STC和比较器CP的存储器单元构成的存储器阵列中,将栅电极连接到搜索线的晶体管的源电极或漏电极的一个电极,构成 比较器CP连接到预充电到高电压的匹配线HMLr。 此外,匹配检测器MDr布置在预充电到低电压的匹配线LMLr上,以根据数据的比较结果来识别在匹配线处产生的比较信号电压。 根据这种存储器阵列结构和操作,可以在低功率和高速度下执行比较操作,同时在匹配线对中避免搜索线噪声的影响。 因此,可以实现允许高速搜索操作的低功率内容可寻址存储器。
    • 8. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20060193160A1
    • 2006-08-31
    • US11354131
    • 2006-02-15
    • Satoru HanzawaRiichiro TakemuraKazuhiko Kajigaya
    • Satoru HanzawaRiichiro TakemuraKazuhiko Kajigaya
    • G11C15/00
    • G11C15/04G11C15/043
    • Control clocks of different phases are distributed to a memory array divided into multiple banks, and processing of entries and search keys (read and write operations and search operation) is performed at different phases. The memory array divided into banks is further divided into smaller arrays, that is, sub-arrays, and a sense amplifier in a read-write-search circuit block is shared by the two sub-arrays. In this case, a so-called open bit line structure in which each one bit line is connected from both sub-arrays to a sense amplifier is adopted. The same look-up table is registered to multiple banks, successively inputted search keys are sequentially inputted to the multiple banks, and the search operation is carried out in synchronization with the control clocks of different phases.
    • 将不同相位的控制时钟分配到划分为多个存储体的存储器阵列,并且在不同阶段执行条目和搜索关键字的处理(读取和写入操作和搜索操作)。 划分为存储体的存储器阵列进一步分成较小的阵列,即子阵列,并且读写搜索电路块中的读出放大器由两个子阵列共享。 在这种情况下,采用所谓的开放位线结构,其中每个位线都从两个子阵列连接到读出放大器。 相同的查找表被注册到多个存储体,连续输入的搜索键被顺序地输入到多个存储体,并且与不同相位的控制时钟同步地执行搜索操作。