专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100020618A1 NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM 失效
标题翻译：非易失性存储器件和存储器系统
公开(公告)号：US20100020618A1
公开(公告)日：2010-01-28
申请号：US12498477
申请日：2009-07-07
申请人： Chan-Ho Kim , Sang-Won Hwang
发明人： Chan-Ho Kim , Sang-Won Hwang
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C16/0483 , G11C7/12 , G11C16/24
摘要： A nonvolatile memory device includes a plurality of memory cells connected to a wordline and arranged in a row direction, bitlines connected to the plurality of memory cells, respectively, and a bitline bias circuit configured to separately control bias voltages provided to the bitlines according to positions of the memory cells along the row direction.
摘要翻译：非易失性存储器件包括连接到字线并沿行方向布置的多个存储器单元，分别连接到多个存储器单元的位线和位线偏置电路，其被配置为根据位置分别控制提供给位线的偏置电压的存储单元沿着行方向。

2. 发明申请

US20110194353A1 METHOD OF PROGRAMMING MEMORY CELLS FOR A NON-VOLATILE MEMORY DEVICE 有权
标题翻译：编写非易失性存储器件的存储器单元的方法
公开(公告)号：US20110194353A1
公开(公告)日：2011-08-11
申请号：US13022688
申请日：2011-02-08
申请人： Sang-Won Hwang , Chan-Ho Kim
发明人： Sang-Won Hwang , Chan-Ho Kim
IPC分类号： G11C16/10
CPC分类号： G11C16/12 , G11C11/5628 , G11C16/3454
摘要： A method of programming memory cells for a non-volatile memory device is provided. The method includes performing an incremental step pulse program (ISPP) operation based on a program voltage, a first verification voltage, and a second verification voltage, and changing an increment value of the program voltage based on a first pass-fail result of the memory cells, the first pass-fail result being generated based on the first verification voltage. The ISPP operation is finished based on a second pass-fail result of the memory cells, the second pass-fail result being generated based on the second verification voltage.
摘要翻译：提供了一种用于非易失性存储器件的存储器单元的编程方法。该方法包括基于编程电压，第一验证电压和第二验证电压来执行增量步进脉冲程序（ISPP）操作，并且基于存储器的第一通过失败结果来改变编程电压的增量值基于第一验证电压产生第一通过失败结果。基于存储单元的第二通过失败结果完成ISPP操作，基于第二验证电压生成第二通过失败结果。

3. 发明授权

US08446776B2 Method of programming memory cells for a non-volatile memory device 有权
标题翻译：为非易失性存储器件编程存储器单元的方法
公开(公告)号：US08446776B2
公开(公告)日：2013-05-21
申请号：US13022688
申请日：2011-02-08
申请人： Sang-Won Hwang , Chan-Ho Kim
发明人： Sang-Won Hwang , Chan-Ho Kim
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C11/5628 , G11C16/3454
摘要： A method of programming memory cells for a non-volatile memory device is provided. The method includes performing an incremental step pulse program (ISPP) operation based on a program voltage, a first verification voltage, and a second verification voltage, and changing an increment value of the program voltage based on a first pass-fail result of the memory cells, the first pass-fail result being generated based on the first verification voltage. The ISPP operation is finished based on a second pass-fail result of the memory cells, the second pass-fail result being generated based on the second verification voltage.
摘要翻译：提供了一种用于非易失性存储器件的存储器单元的编程方法。该方法包括基于编程电压，第一验证电压和第二验证电压来执行增量步进脉冲程序（ISPP）操作，并且基于存储器的第一通过失败结果来改变编程电压的增量值基于第一验证电压产生第一通过失败结果。基于存储单元的第二通过失败结果完成ISPP操作，基于第二验证电压生成第二通过失败结果。

4. 发明授权

US08659482B2 MIMO antenna having plurality of isolation adjustment portions 有权
标题翻译： MIMO天线具有多个隔离调整部分
公开(公告)号：US08659482B2
公开(公告)日：2014-02-25
申请号：US13300413
申请日：2011-11-18
申请人： Chan-Ho Kim , Jin-Myung Kim , Jae-Ho Lee , Heung-Ju Ahn
发明人： Chan-Ho Kim , Jin-Myung Kim , Jae-Ho Lee , Heung-Ju Ahn
IPC分类号： H01Q1/38
CPC分类号： H01Q21/28 , H01Q1/243 , H01Q1/521 , H01Q9/42
摘要： A Multiple-Input and Multiple-Output (MIMO) antenna having a plurality of isolation adjustment portions is provided. The MIMO antenna includes a plurality of radiation elements and a plurality of isolation adjustment portions. The plurality of radiation elements is symmetrically formed on the surfaces of the left and right sides of a dielectric element having a predetermined shape, is spaced apart from each other by a predetermined distance, operates in multiple frequency bands, and includes feeding portions, respectively. The plurality of isolation adjustment portions is coupled to the plurality of radiation elements so that they have electromagnetic characteristics different from those of the plurality of radiation elements, thereby improving isolation in each of the frequency bands in which the plurality of radiation elements operate.
摘要翻译：提供了具有多个隔离调整部分的多输入多输出（MIMO）天线。 MIMO天线包括多个辐射元件和多个隔离调整部分。多个辐射元件对称地形成在具有预定形状的介质元件的左侧和右侧的表面上，彼此隔开预定距离，在多个频带中操作，并且分别包括馈送部分。多个隔离调整部分耦合到多个辐射元件，使得它们具有与多个辐射元件不同的电磁特性，从而改善了多个辐射元件在其中工作的每个频带中的隔离。

5. 发明授权

US07778058B2 Flash memory device which includes strapping line connected to selection line 有权
标题翻译：闪存设备，包括连接到选线的捆扎线
公开(公告)号：US07778058B2
公开(公告)日：2010-08-17
申请号：US11657077
申请日：2007-01-24
申请人： Chan-Ho Kim
发明人： Chan-Ho Kim
IPC分类号： G11C5/06
CPC分类号： G11C8/10 , G11C16/0483 , G11C16/3418 , G11C16/3427
摘要： A NAND flash array includes a first selection transistor coupled to a first selection line, a second selection transistor coupled to a second selection line, memory cells operably coupled to word lines and connected to each other in series between the first and second selection transistors, and a strapping line electrically connected to the first selection line.
摘要翻译： NAND闪存阵列包括耦合到第一选择线的第一选择晶体管，耦合到第二选择线的第二选择晶体管，可操作地耦合到字线并且彼此串联连接在第一和第二选择晶体管之间的存储单元，以及电连接到第一选择线的捆扎线。

6. 发明申请

US20050259466A1 Semiconductor memory device with signal lines arranged across memory cell array thereof 有权
标题翻译：具有跨越其存储单元阵列布置的信号线的半导体存储器件
公开(公告)号：US20050259466A1
公开(公告)日：2005-11-24
申请号：US10976512
申请日：2004-10-29
申请人： Chan-Ho Kim
发明人： Chan-Ho Kim
IPC分类号： G11C16/04 , G11C5/06 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C5/063 , G11C16/04
摘要： A semiconductor memory device comprises a memory cell array including a plurality of data storage regions having a plurality of memory cells and a plurality of dummy regions occupying space between the plurality of data storage regions, at least one peripheral logic arranged around the memory cell array, and a control logic for controlling operations of the peripheral logic, wherein a plurality of signal lines for connecting the peripheral logic and the control logic are arranged in the plurality of dummy regions.
摘要翻译：一种半导体存储器件，包括存储单元阵列，该存储单元阵列包括具有多个存储器单元的多个数据存储区域和占据多个数据存储区域之间的空间的多个虚拟区域，布置在存储单元阵列周围的至少一个外围逻辑，以及用于控制外围逻辑的操作的控制逻辑，其中用于连接外围逻辑和控制逻辑的多条信号线被布置在多个虚拟区域中。

7. 发明授权

US6006539A Apparatus for dispensing cool air vertically and horizontally in a refrigerator 失效
标题翻译：用于在冰箱中垂直和水平地分配冷空气的装置
公开(公告)号：US6006539A
公开(公告)日：1999-12-28
申请号：US129182
申请日：1998-08-04
申请人： Jae-Hoon Lim , Jung-Hoon Lee , Sang-Gyu Jung , Sun-Guy Lee , Chan-Ho Kim
发明人： Jae-Hoon Lim , Jung-Hoon Lee , Sang-Gyu Jung , Sun-Guy Lee , Chan-Ho Kim
IPC分类号： F25D17/08 , F24F13/075 , F24F13/14 , F25D17/06 , F25D17/04
CPC分类号： F25D17/065 , F24F13/075 , F24F11/0078 , F24F2013/1473 , F24F2221/48 , F25D2317/0653 , F25D2317/0672 , F25D2400/04
摘要： A refrigerator includes a main body, freezing and refrigerating compartments formed in the main body, an evaporator for generating cool air, and a cool air dispersing system for dispersing cool air in the refrigerating compartment. The cool air dispersing system has a horizontal cool air dispersing device rotatable about a vertical axis for dispersing the cool air in a horizontal direction, a motor for rotating the horizontal cool air dispersing device, and a vertical cool air dispersing device for dispersing the cool air in the vertical direction. A force converting device is provided for vertically moving the vertical cool air dispersing device using a rotational force of the horizontal cool air dispersing device.
摘要翻译：冰箱包括主体，形成在主体中的冷冻室和冷藏室，用于产生冷空气的蒸发器，以及用于将冷空气分散在冷藏室中的冷空气分散系统。冷空气分散系统具有可绕垂直轴线旋转的水平冷却空气分散装置，用于将冷空气沿水平方向分散，用于旋转水平冷却空气分散装置的电动机和用于分散冷空气的立式冷空气分散装置在垂直方向。提供了一种力转换装置，用于使用水平冷却空气分配装置的旋转力垂直移动垂直冷却空气分配装置。

8. 发明授权

US07149112B2 Semiconductor memory device with signal lines arranged across memory cell array thereof 有权
标题翻译：具有跨越其存储单元阵列布置的信号线的半导体存储器件
公开(公告)号：US07149112B2
公开(公告)日：2006-12-12
申请号：US10976512
申请日：2004-10-29
申请人： Chan-Ho Kim
发明人： Chan-Ho Kim
IPC分类号： G11C11/34 , G11C5/06
CPC分类号： G11C5/063 , G11C16/04
摘要： A semiconductor memory device comprises a memory cell array including a plurality of data storage regions having a plurality of memory cells and a plurality of dummy regions occupying space between the plurality of data storage regions, at least one peripheral logic arranged around the memory cell array, and a control logic for controlling operations of the peripheral logic, wherein a plurality of signal lines for connecting the peripheral logic and the control logic are arranged in the plurality of dummy regions.
摘要翻译：一种半导体存储器件，包括存储单元阵列，该存储单元阵列包括具有多个存储器单元的多个数据存储区域和占据多个数据存储区域之间的空间的多个虚拟区域，布置在存储单元阵列周围的至少一个外围逻辑，以及用于控制外围逻辑的操作的控制逻辑，其中用于连接外围逻辑和控制逻辑的多条信号线被布置在多个虚拟区域中。

9. 发明申请

US20080080246A1 Flash memory device which includes strapping line connected to selection line 有权
标题翻译：闪存设备，包括连接到选线的捆扎线
公开(公告)号：US20080080246A1
公开(公告)日：2008-04-03
申请号：US11657077
申请日：2007-01-24
申请人： Chan-Ho Kim
发明人： Chan-Ho Kim
IPC分类号： G11C16/04 , G11C11/34
CPC分类号： G11C8/10 , G11C16/0483 , G11C16/3418 , G11C16/3427
摘要： A NAND flash array includes a first selection transistor coupled to a first selection line, a second selection transistor coupled to a second selection line, memory cells operably coupled to word lines and connected to each other in series between the first and second selection transistors, and a strapping line electrically connected to the first selection line.
摘要翻译： NAND闪存阵列包括耦合到第一选择线的第一选择晶体管，耦合到第二选择线的第二选择晶体管，可操作地耦合到字线并且彼此串联连接在第一和第二选择晶体管之间的存储单元，以及电连接到第一选择线的捆扎线。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式