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    • 1. 发明申请
    • Method and apparatus for testing semiconductor devices using an actual board-type product
    • 使用实际板式产品测试半导体器件的方法和装置
    • US20050057272A1
    • 2005-03-17
    • US10982646
    • 2004-11-03
    • Sang-Jun ParkChang-Nyun KimHyun-Ho ParkNam-Sik JeongJong-Hyun KimChung-Koo Yoon
    • Sang-Jun ParkChang-Nyun KimHyun-Ho ParkNam-Sik JeongJong-Hyun KimChung-Koo Yoon
    • G01R31/28G01R31/319G11C29/48G11C29/56G01R31/26
    • G11C29/48G01R31/31905G11C29/56016
    • A method and apparatus for testing semiconductor devices allows devices to be tested under actual operating conditions by interfacing the devices to an actual board-type product. The semiconductor devices are interfaced to the board-type product with a test board that includes a mounting unit such as a socket or pattern of conductive lands that allows the devices being tested can be easily mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. For example, the interface circuit can include a clock distribution circuit, which utilizes a phase locked loop, and a register circuit to compensate for electrical loading caused by the device mounting unit, and to provide the proper timing margins between clock signals and control signals applied to the semiconductor devices. A power control circuit can be used to manipulate the supply voltage applied to the semiconductor devices, thereby providing a voltage margin screening function.
    • 用于测试半导体器件的方法和装置允许通过将器件与实际的板式产品相连接,在实际操作条件下测试器件。 半导体器件与板式产品接口,该测试板包括诸如插座或导电焊盘图案的安装单元,其允许被测试的器件能够以最小的努力容易地安装到测试板并从测试板移除, 信号劣化。 测试板上的接口电路补偿了板式产品和安装单元之间的环境差异。 例如,接口电路可以包括使用锁相环的时钟分配电路和用于补偿由器件安装单元引起的电负载的寄存器电路,并且提供时钟信号和施加的控制信号之间的适当时序余量 到半导体器件。 可以使用功率控制电路来操纵施加到半导体器件的电源电压,从而提供电压裕度屏蔽功能。
    • 2. 发明授权
    • Method and apparatus for testing semiconductor devices using an actual board-type product
    • 使用实际板式产品测试半导体器件的方法和装置
    • US07075325B2
    • 2006-07-11
    • US10982646
    • 2004-11-03
    • Sang-Jun ParkChang-Nyun KimHyun-Ho ParkNam-Sik JeongJong-Hyun KimChung-Koo Yoon
    • Sang-Jun ParkChang-Nyun KimHyun-Ho ParkNam-Sik JeongJong-Hyun KimChung-Koo Yoon
    • G01R31/26
    • G11C29/48G01R31/31905G11C29/56016
    • Semiconductor devices are tested under actual operating conditions by interfacing the devices to an actual board-type product, for example, through a test board tat includes a mounting unit such as a socket or pattern of conductive lands that allows the devices being tested to be mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. For example, the interface circuit can include a clock distribution circuit, which utilizes a phase locked loop, and a register circuit to compensate for electrical loading caused by the device mounting unit, and to provide the proper timing margins between clock signals and control signals applied to the semiconductor devices. A power control circuit can be used to manipulate the supply voltage thereby providing a voltage margin screening function.
    • 半导体器件在实际操作条件下通过将器件连接到实际的板式产品来测试,例如,通过包括诸如插座的安装单元或允许被测试器件被安装的导电焊盘图案的测试板 以最小的努力和信号衰减从测试板移除和移除。 测试板上的接口电路补偿了板式产品和安装单元之间的环境差异。 例如,接口电路可以包括使用锁相环的时钟分配电路和用于补偿由器件安装单元引起的电负载的寄存器电路,并且提供时钟信号和施加的控制信号之间的适当时序余量 到半导体器件。 功率控制电路可用于操纵电源电压,从而提供电压裕度屏蔽功能。