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    • 1. 发明授权
    • Symbol timing correction for a phase modulated signal with mutually interfering symbols
    • 具有相互干扰符号的相位调制信号的符号定时校正
    • US07233632B1
    • 2007-06-19
    • US10646259
    • 2003-08-21
    • Samuel C. KingstonOsama Sami HaddadinWilliam K. McIntire
    • Samuel C. KingstonOsama Sami HaddadinWilliam K. McIntire
    • H03D3/24H04L27/22
    • H04L27/22H04L7/0041H04L7/0054H04L7/0083H04L27/2017
    • A circuit and method for correcting timing of a received phase modulated signal. The method uses k most recently received data bits as an address for a lookup table 60. The lookup table includes reconstructed waveforms from which a timing weighing factor is determined. The received PM from time t1 is delayed, phase adjusted, and multiplied by the timing weighing factor, the product of which is used by a timing adjust block 50 to adjust timing of the PM signal at a time after t1. The circuit inputs a PM signal to a timing adjust block 50. The output is split between a matched filter 54 and a loop phase shifter 78. The matched filter feeds alternating I and Q bits into a register 58 that holds k data bits, which are used as an address for a lookup table 60. The output of the lookup table 60 becomes a timing weighing figure, which is multiplied 74 with an output of the loop phase shifter 78 and then input into the timing adjust block 50 for adjusting timing of a PM signal. Phase error may be corrected with minor additional components.
    • 一种用于校正接收相位调制信号定时的电路和方法。 该方法使用k个最近接收的数据比特作为查找表60的地址。 查找表包括确定定时加权因子的重建波形。 从时间t 1 1接收的PM被延迟,相位调整并乘以定时加权因子,其乘积由定时调整块50用于一次调整PM信号的定时 在t 1之后。 电路将PM信号输入到定时调整块50。 输出在匹配滤波器54和环路移相器78之间分开。 匹配滤波器将交替的I和Q位馈送到寄存器58,寄存器58保存k个数据位,这些数据位用作查找表60的地址。 查找表60的输出成为定时加权图,其与环路移相器78的输出相乘74,然后输入到定时调整块50中,以调整PM信号的定时。 相位误差可以用较小的附加组件来校正。
    • 2. 发明授权
    • Phase correction for a phase modulated signal with mutually interfering symbols
    • 具有相互干扰符号的相位调制信号的相位校正
    • US07263139B1
    • 2007-08-28
    • US10646101
    • 2003-08-22
    • Samuel C. KingstonOsama Sami HaddadinWilliam K. McIntire
    • Samuel C. KingstonOsama Sami HaddadinWilliam K. McIntire
    • H03D3/24H03D3/00H04L27/22
    • H04L27/2272H04L7/0054H04L7/0083H04L2027/0055
    • A circuit and method for correcting phase of a received phase modulated (PM) signal. The method uses k most recently received data bits, which alternate between in-phase I and quadrature Q bits, as an address for a lookup table 60. The lookup table outputs a phase figure 62 derived from a reconstructed waveform. When the most recent k bit is a Q bit, the complement 68 of the phase figure 62 is calculated to yield a phase correction. Otherwise, the phase figure is the phase correction, which is applied to adjust the phase of a delayed version of the received signal. The delayed, phase adjusted signal is then applied to correct the phase of a received signal. The circuit splits an input PM signal in parallel between a matched filter 54 and a delay block 76, 88. The matched filter output provides the input to a register 58 for storing the k data bits. The delay block holds the PM signal until it is input into a loop phase shifter 78 synchronously with the phase correction. The output of the loop phase filter is input, after filtering, to a primary phase shifter 52 that adjusts phase of a received PM signal.
    • 一种用于校正接收相位调制(PM)信号的相位的电路和方法。 该方法使用k个最近接收的数据位,其在同相I和正交Q位之间交替,作为查找表60的地址。 查找表输出从重构波形得出的相位图62。 当最近的k位是Q位时,相位图62的补码68被计算以产生相位校正。 否则,相位图是相位校正,其用于调整接收信号的延迟版本的相位。 然后施加延迟的相位调整信号以校正接收信号的相位。 电路将输入PM信号并入匹配滤波器54和延迟块76,88之间。 匹配滤波器输出将输入提供给寄存器58以存储k个数据位。 延迟块保持PM信号,直到其与相位校正同步地输入到环路移相器78中。 滤波后的环路相位滤波器的输出被输入到调整接收到的PM信号的相位的主移相器52。
    • 4. 发明授权
    • Synchronous multipoint-to-point CDMA communication system
    • 同步多点对点CDMA通信系统
    • US5499236A
    • 1996-03-12
    • US291648
    • 1994-08-16
    • Thomas R. GiallorenziMark T. RafterKenneth C. GreenwoodHarry B. PressSamuel C. Kingston
    • Thomas R. GiallorenziMark T. RafterKenneth C. GreenwoodHarry B. PressSamuel C. Kingston
    • H04B1/7085H04B1/7103H04J3/06H04J13/00H04J14/00H04J13/02H04L7/00
    • H04J13/00H04B1/7085H04B1/7103H04J3/0682H04B2201/709709H04J14/005
    • A multipoint-to-point CDMA communication system comprises a plurality of CDMA transmitting stations and a single CDMA receiving station, all of which are intercoupled to each other over one CDMA channel and one feedback channel. On the one CDMA channel, the plurality of CDMA transmitting stations simultaneously send respective CDMA signals to the receiving station. In the receiving station, respective time differences are measured between a reference clock signal and the spreading codes in the CDMA signals from each of the CDMA transmitting stations; and these time differences are indicated in respective error signals which the CDMA receiving station sends on the feedback channel to each of the CDMA transmitting stations. Each CDMA station responds to its error signals by time shifting its spreading code such that it arrives in the receiving station in synchronization with the reference clock signal. This synchronization enables interference between the spreading codes at the receiving station to be reduced by using codes which have minimal cross-correlation when their time difference is zero; and consequently, the maximum number of stations that can simultaneously transmit is increased.
    • 多点对点CDMA通信系统包括多个CDMA发射站和单个CDMA接收站,它们都通过一个CDMA信道和一个反馈信道相互耦合。 在一个CDMA信道上,多个CDMA发送站同时向接收站发送各自的CDMA信号。 在接收站中,在来自每个CDMA发射站的CDMA信号中的参考时钟信号和扩展码之间测量各自的时间差; 并且这些时间差在CDMA接收站在反馈信道上向每个CDMA发射站发送的各个误差信号中指示。 每个CDMA站通过对其扩展码进行时移来响应其误差信号,使得它们与参考时钟信号同步地到达接收站。 该同步使得当它们的时间差为零时,通过使用具有最小互相关的代码来减少接收站处的扩展码之间的干扰; 因此,可以同时发送的站的最大数量增加。
    • 7. 发明授权
    • Digital phase shifter
    • 数字移相器
    • US4841552A
    • 1989-06-20
    • US177283
    • 1988-04-04
    • Samuel C. Kingston
    • Samuel C. Kingston
    • G06F7/548H03H17/08
    • H03H17/08
    • A novel digital phase shifter is provided for accomplishing digital phase shifting without the requirement of complex multiplication. The phase shifter includes buffer registers for receiving and storing the inphase and quadrature components of a complex number and for storing in a phase command register the information indicative of the phase shift to be accomplished. The phase shifting apparatus comprises a command map for generating a plurality of plus or minus phase shift command bits. A plurality of plus or minus phase shift registers are coupled to the phase shift command bits for performing plus or minus phase shifts of predetermined angles that diminish by a factor of approximately one-half from the previous phase shift angle.
    • 提供了一种新颖的数字移相器来实现数字相移,而不需要复数乘法。 移相器包括用于接收和存储复数的同相和正交分量的缓冲寄存器,并且用于在相位命令寄存器中存储指示要实现的相移的信息。 相移装置包括用于产生多个正或负相移指令位的命令图。 多个正或负相移寄存器耦合到相位移位指令位,用于执行预定角度的相移或减数相移比前一相移角大约一半的相移。
    • 10. 发明授权
    • High rate-low rate PN code tracking system
    • 高速率低速PN码跟踪系统
    • US5299229A
    • 1994-03-29
    • US10723
    • 1993-01-29
    • John W. Zscheile, Jr.Alan E. LundquistSamuel C. Kingston
    • John W. Zscheile, Jr.Alan E. LundquistSamuel C. Kingston
    • H04K1/02H04B1/7085H04L27/30
    • H04B1/7085
    • A high PN code rate receiving system is provided for receiving, recovering and tracking a high rate PN composite code comprising a low rate PN code combined with a high rate PN code and wherein the receiving system comprises a broad band receiver for receiving the high rate PN composite code and further includes a data recovery channel and a tracking loop channel. The data recovery channel comprises a high rate mixer and a low rate mixer for removing the high data rate component code and the low data rate component code to provide a low data rate data stream. The tracking loop channel comprises a high rate early-late tracking system for producing a high rate error signal and further comprises a low rate portion of the tracking loop for producing a low rate error signal which is combined with the data output to provide a clock error signal. The clock error signal is applied to a voltage controlled oscillator to produce a low data rate clock and a high data rate clock which are coupled to a low data rate code generator and a high data rate code generator which synchronize the tracking loop and said data channel.
    • 提供高PN码率接收系统用于接收,恢复和跟踪包括与高速率PN码组合的低速率PN码的高速率PN复合码,并且其中接收系统包括用于接收高速率PN 并且还包括数据恢复通道和跟踪循环通道。 数据恢复通道包括用于去除高数据速率分量代码和低数据速率分量代码以提供低数据速率数据流的高速率混频器和低速率混频器。 跟踪环通道包括用于产生高速率误差信号的高速率早期跟踪系统,并且还包括用于产生低速率误差信号的跟踪环路的低速率部分,该低速率误差信号与数据输出相结合以提供时钟误差 信号。 时钟误差信号被施加到压控振荡器以产生低数据速率时钟和高数据速率时钟,该数据速率时钟和高数据速率时钟耦合到低数据速率代码发生器和高数据速率代码发生器,其使跟踪环路和所述数据通道同步 。