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1. 发明授权

US08736019B2 Semiconductor devices with sealed, unlined trenches and methods of forming same 有权
公开(公告)号：US08736019B2
公开(公告)日：2014-05-27
申请号：US13091410
申请日：2011-04-21
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L21/76
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.

2. 发明授权

US08716829B2 Semiconductor devices with sealed, unlined trenches and methods of forming same 有权
标题翻译：具有密封，无衬里的沟槽的半导体器件及其形成方法
公开(公告)号：US08716829B2
公开(公告)日：2014-05-06
申请号：US13091416
申请日：2011-04-21
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L21/76
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

3. 发明授权

US08129252B2 Semiconductor devices with sealed, unlined trenches and methods of forming same 有权
标题翻译：具有密封，无衬里的沟槽的半导体器件及其形成方法
公开(公告)号：US08129252B2
公开(公告)日：2012-03-06
申请号：US12472424
申请日：2009-05-27
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L21/76
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

4. 发明授权

US07944018B2 Semiconductor devices with sealed, unlined trenches and methods of forming same 有权
标题翻译：具有密封，无衬里的沟槽的半导体器件及其形成方法
公开(公告)号：US07944018B2
公开(公告)日：2011-05-17
申请号：US11838359
申请日：2007-08-14
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L21/76
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

5. 发明申请

US20090233415A1 Semiconductor Devices with Sealed, Unlined Trenches and Methods of Forming Same 有权
标题翻译：具有密封，无衬底的沟槽的半导体器件及其形成方法
公开(公告)号：US20090233415A1
公开(公告)日：2009-09-17
申请号：US12472424
申请日：2009-05-27
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L21/764
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

6. 发明申请

US20110193158A1 Semiconductor Devices With Sealed, Unlined Trenches and Methods of Forming Same 有权
标题翻译：具有密封，无衬底的沟槽和形成方法的半导体器件
公开(公告)号：US20110193158A1
公开(公告)日：2011-08-11
申请号：US13091416
申请日：2011-04-21
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

7. 发明申请

US20110193176A1 Semiconductor Devices with Sealed, Unlined Trenches and Methods of Forming Same 有权
标题翻译：具有密封，无衬底的沟槽的半导体器件及其形成方法
公开(公告)号：US20110193176A1
公开(公告)日：2011-08-11
申请号：US13091410
申请日：2011-04-21
申请人： Samuel Anderson , Koon Chong So
发明人： Samuel Anderson , Koon Chong So
IPC分类号： H01L27/06 , H01L29/06
CPC分类号： H01L29/7813 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/66143 , H01L29/66734 , H01L29/7811 , H01L29/872
摘要： A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is air-tight. First and second regions are separated by the trench. The first region may include a superjunction Schottky diode or MOSFET. In an alternative embodiment, a plurality of regions are separated by a plurality of unlined and sealed trenches.
摘要翻译：半导体器件包括无衬里和密封的沟槽以及用于形成无衬里和密封沟槽的方法。更具体地说，超结半导体器件包括无衬里和密封的沟槽。沟槽具有由半导体材料形成的侧壁。沟槽用密封材料密封，使得沟槽是气密的。第一和第二区域被沟槽分开。第一区域可以包括超连接肖特基二极管或MOSFET。在替代实施例中，多个区域被多个无衬里和密封的沟槽隔开。

8. 发明申请

US20060163709A1 Chip-scale monolithic load switch for portable applications 有权
标题翻译：用于便携式应用的芯片级单片负载开关
公开(公告)号：US20060163709A1
公开(公告)日：2006-07-27
申请号：US11336306
申请日：2006-01-18
申请人： Samuel Anderson , David Okada
发明人： Samuel Anderson , David Okada
IPC分类号： H01L23/02
CPC分类号： H01L27/092 , H01L2924/0002 , H01L2924/00
摘要： A chip-scale package houses a monolithic semiconductor die containing first and second lateral metal oxide semiconductor field effect transistors (MOSFETs) formed on a surface of the semiconductor die. The MOSFETs are formed using a lateral double diffused metal oxide semiconductor structure. The first MOSFET has a first conduction terminal coupled to a first package terminal and a second conduction terminal coupled to a second package terminal. The second MOSFET has a first conduction terminal coupled to a control terminal of the first MOSFET, a second conduction terminal coupled to a third package terminal, and a control terminal coupled to a fourth package terminal. A resistor is coupled between the first package terminal and the control terminal of the first MOSFET. A logic level enable signal controls the first MOSFET to enable the second MOSFET to connect a DC voltage from the first package terminal to the second package terminal.
摘要翻译：芯片级封装容纳包含形成在半导体管芯的表面上的第一和第二横向金属氧化物半导体场效应晶体管（MOSFET）的单片半导体管芯。 MOSFET使用横向双扩散金属氧化物半导体结构形成。第一MOSFET具有耦合到第一封装端子的第一导电端子和耦合到第二封装端子的第二导电端子。第二MOSFET具有耦合到第一MOSFET的控制端子的第一导电端子，耦合到第三封装端子的第二导通端子和耦合到第四封装端子的控制端子。电阻器耦合在第一封装端子和第一MOSFET的控制端子之间。逻辑电平使能信号控制第一MOSFET使第二MOSFET能够将来自第一封装端子的直流电压连接到第二封装端子。

9. 发明申请

US20060163658A1 Monolithic MOSFET and schottky diode for mobile phone boost converter 审中-公开
标题翻译：用于手机升压转换器的单片MOSFET和肖特基二极管
公开(公告)号：US20060163658A1
公开(公告)日：2006-07-27
申请号：US11336525
申请日：2006-01-18
申请人： Samuel Anderson , David Okada
发明人： Samuel Anderson , David Okada
IPC分类号： H01L23/62
CPC分类号： H01L29/782 , H01L27/0255 , H01L27/0629 , H01L29/0692 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A cell phone has a plurality of interconnected electronic components for performing the electrical functions of the phone. A DC/DC converter provides an operating voltage which is applied to power supply terminals of the plurality of interconnected electronic components. The DC/DC converter uses a monolithic semiconductor device containing a power metal oxide semiconductor field effect transistor (MOSFET) and Schottky diode. The semiconductor device has the lateral diffused MOSFET formed on a surface of the semiconductor device. The MOSFET is formed with a plurality conduction fingers. The Schottky diode is also formed on the surface of the semiconductor device and integrated between the plurality of conduction fingers of the MOSFET. The drain of the MOSFET is connected to the anode of the diode on the surface of the monolithic semiconductor device.
摘要翻译：手机具有用于执行电话的电功能的多个互连的电子部件。 DC / DC转换器提供施加到多个相互连接的电子部件的电源端子的工作电压。 DC / DC转换器使用包含功率金属氧化物半导体场效应晶体管（MOSFET）和肖特基二极管的单片半导体器件。半导体器件具有形成在半导体器件的表面上的横向扩散MOSFET。 MOSFET由多个导电指形成。肖特基二极管也形成在半导体器件的表面上并且集成在MOSFET的多个导通指之间。 MOSFET的漏极连接到单片半导体器件表面上的二极管的阳极。

10. 发明申请

US20090026586A1 Superjunction Device Having Oxide Lined Trenches and Method for Manufacturing a Superjunction Device Having Oxide Lined Trenches 审中-公开
标题翻译：具有氧化物衬里沟槽的超结构装置和制造具有氧化物衬里沟槽的超级结装置的方法
公开(公告)号：US20090026586A1
公开(公告)日：2009-01-29
申请号：US10596720
申请日：2006-04-21
申请人： Samuel Anderson
发明人： Samuel Anderson
IPC分类号： H01L29/06 , H01L21/22
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/407 , H01L29/41741 , H01L29/7395 , H01L29/7802 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device includes providing semiconductor substrate having trenches and mesas. At least one mesa has first and second sidewalls. The method includes doping with a dopant of a second conductivity the first sidewall of the mesa, and doping with a dopant of a second conductivity the second sidewall of the mesa. A dopant of the first conductivity is then used to dope the first sidewall of the mesa, and the dopant of the first conductivity is used to dope the second sidewall of the at least one mesa. At least the trenches adjacent to the at least one mesa are then lined with an oxide material and are then filled with one of a semi-insulating material and an insulating material.
摘要翻译：制造半导体器件的方法包括提供具有沟槽和台面的半导体衬底。至少一个台面具有第一和第二侧壁。该方法包括用第二导电性的掺杂剂掺杂台面的第一侧壁，并掺杂具有第二导电性的掺杂剂，台阶的第二侧壁。然后使用第一导电性的掺杂剂来掺杂台面的第一侧壁，并且使用第一导电性的掺杂剂来掺杂至少一个台面的第二侧壁。至少邻近至少一个台面的沟槽然后用氧化物材料衬里，然后用半绝缘材料和绝缘材料中的一种填充。

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