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    • 2. 发明申请
    • SEMICONDUCTOR DEVICES INCLUDING A FINFET
    • 包括FINFET的半导体器件
    • US20160293750A1
    • 2016-10-06
    • US15049859
    • 2016-02-22
    • Samsung Electronics Co., Ltd.
    • Jin-Bum KIMNam Kyu KIMHyun-Ho NOHDong-Chan SUHByeong-Chan LEESu-Jin JUNGJin-Yeong JOEBon-Young KOO
    • H01L29/78H01L29/06H01L29/16
    • H01L29/785H01L29/0649H01L29/16H01L29/161H01L29/165H01L29/7848H01L29/7856
    • A semiconductor device includes an active fin structure extending in a first direction, the active fin structure including protruding portions divided by a recess, a plurality of gate structures extending in a second direction crossing the first direction and covering the protruding portions of the active fin structure, a first epitaxial pattern in a lower portion of the recess between the gate structures, a second epitaxial pattern on a portion of the first epitaxial pattern, the second epitaxial pattern contacting a sidewall of the recess, and a third epitaxial pattern on the first and second epitaxial patterns, the third epitaxial pattern filling the recess. The first epitaxial pattern includes a first impurity region having a first doping concentration, the second epitaxial pattern includes a second impurity region having a second doping concentration lower than the a first doping concentration, and the third epitaxial pattern includes a third impurity region having a third doping concentration higher than the second doping concentration. The semiconductor device may have good electrical characteristics.
    • 半导体器件包括沿第一方向延伸的有源鳍结构,所述有源鳍结构包括由凹部分隔的突出部分,沿与第一方向交叉的第二方向延伸并覆盖有源鳍结构的突出部分的多个栅极结构 ,在栅极结构之间的凹部的下部中的第一外延图案,在第一外延图案的一部分上的第二外延图案,第二外延图案接触凹槽的侧壁,以及在第一外延图案的第一和第二外延图案 第二外延图案,填充凹槽的第三外延图案。 第一外延图案包括具有第一掺杂浓度的第一杂质区,第二外延图案包括具有低于第一掺杂浓度的第二掺杂浓度的第二杂质区,并且第三外延图包括具有第三掺杂浓度的第三杂质区 掺杂浓度高于第二掺杂浓度。 半导体器件可具有良好的电特性。
    • 5. 发明申请
    • SEMICONDUCTOR DEVICES (as amended)
    • SEMICONDUCTOR DEVICES(经修订)
    • US20140027824A1
    • 2014-01-30
    • US13921616
    • 2013-06-19
    • Samsung Electronics Co., Ltd.
    • Keum-Seok PARKJung-Ho YOOWoo-Bin SONGByeong-Chan LEE
    • H01L29/78
    • H01L29/78H01L21/823814H01L29/0684H01L29/165H01L29/6656H01L29/66636H01L29/7834H01L29/7848
    • In a semiconductor device and a method of manufacturing the same, the semiconductor device includes a gate structure crossing an active region of a silicon substrate. Spacers are provided on both sides of the gate structure, respectively. Silicon patterns fill up recessed portions of the silicon substrate and on both sides of the spacers and has a shape protruding higher than a bottom surface of the gate structure, a lower edge of the protruded portion partially makes contact with a top surface of the isolation region, a first side and a second side of each of the silicon patterns, which are opposite to each other in a channel width direction in the gate structure, are inclined toward an inside of the active region. A highly doped impurity region is provided in the silicon patterns and doped with an N type impurity. The semiconductor device represents superior threshold voltage characteristics.
    • 在半导体器件及其制造方法中,半导体器件包括与硅衬底的有源区交叉的栅极结构。 分别设置在门结构的两侧。 硅图案填充硅衬底的凹陷部分并且在间隔物的两侧上并且具有高于栅极结构的底表面突出的形状,突出部分的下边缘部分地与隔离区域的顶表面接触 ,在栅极结构中的沟道宽度方向上彼此相对的每个硅图案的第一侧和第二侧朝向有源区域的内部倾斜。 在硅图案中提供高掺杂杂质区,并掺杂有N型杂质。 半导体器件表现出优异的阈值电压特性。