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    • 4. 发明专利
    • Method of manufacturing thin film transistor display panel
    • 制造薄膜晶体管显示面板的方法
    • JP2008047919A
    • 2008-02-28
    • JP2007212088
    • 2007-08-16
    • Korea Advanced Inst Of Sci TechnolSamsung Electronics Co Ltd三星電子株式会社Samsung Electronics Co.,Ltd.韓国科学技術院
    • CHOI JAE-BEOMCHANG YOUNG-JINCHOI YOON-SEOKSHIM SEUNG-HWANJO HAN-NASHIN JUNG-HOONKOH JOON-YOUNG
    • H01L21/336G02F1/1368H01L21/20H01L29/786
    • H01L21/02672H01L21/02532H01L27/1277H01L27/1281
    • PROBLEM TO BE SOLVED: To improve the specific property and reliability of a thin film transistor by minimizing the leak current through a metal included in the thin film transistor. SOLUTION: The method of manufacturing a thin film transistor includes a step of forming a non-crystallin silicon film on an insulation substrate, a step of forming a sacrificial film having a protrusion and recess on the non-crystalline silicon film, a step of forming a poly-crystallin silicon film by crystallizing the non-crystalline silicon film by a heat treatment after a metal plate is contacted on the sacrificial film, a step of removing the metal plate and the sacrificial film, a step of forming an island shape member by patterning the poly-crystallin silicon film, a step of forming a gate insulation film covering the island shape member, a step of forming a gate line on the insulation film partially overlapping the island shape member, a step of forming a source/drain region by highly doping a conductive impurity in the predetermined region of the island shape member, a step of forming an inter layer insulation film covering the gate line and the island shape member, and a step of forming a data line and an output electrode on the inter layer insulation film conncted to the source/drain region. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:通过最小化包括在薄膜晶体管中的金属的漏电流来提高薄膜晶体管的具体性能和可靠性。 解决方案:制造薄膜晶体管的方法包括在绝缘基板上形成非晶态硅膜的步骤,在非晶硅膜上形成具有突起和凹陷的牺牲膜的步骤, 在金属板在牺牲膜上接触之后通过热处理使非晶硅膜结晶来形成多晶硅蛋白硅膜的步骤,去除金属板和牺牲膜的步骤,形成岛的步骤 通过对多晶硅硅膜进行图案化,形成覆盖岛状构件的栅极绝缘膜的工序,在与岛状构件部分重叠的绝缘膜上形成栅极线的工序,形成源极/ 漏区,通过在岛状构件的预定区域中高度掺杂导电杂质,形成覆盖栅极线和岛状构件的层间绝缘膜的步骤,以及st 在与源极/漏极区域连接的层间绝缘膜上形成数据线和输出电极的ep。 版权所有(C)2008,JPO&INPIT