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    • 1. 发明授权
    • Display apparatus having a gate drive circuit
    • 具有栅极驱动电路的显示装置
    • US09355741B2
    • 2016-05-31
    • US14276801
    • 2014-05-13
    • Samsung Display Co., LTD.
    • Sang-Jin JeonJun-Ki JeongSe-Hyoung Cho
    • G09G3/36G11C19/28
    • G11C19/28G09G3/3677G09G2310/0286
    • A gate drive circuit includes a shift register having a plurality of stages, in which an n-th stage (‘n’ is a natural number) of the plurality of stages is connected to at least one subsequent stage. The n-th stage includes a pull-up part configured to output a high voltage of an n-th gate signal using a high voltage of a clock signal as in response to a high voltage of a control node, a control pull-down part configured to pull-down a voltage of the control node into a low voltage in response to a carry signal outputted from at least one of next stages of the n-th stage and receiving a back-bias voltage corresponding to the low voltage, and a carry part configured to output the high voltage of the clock signal as an n-th carry signal in response to a high voltage of the control node.
    • 栅极驱动电路包括具有多个级的移位寄存器,其中多级的第n级('n'是自然数)连接到至少一个后级。 第n级包括上拉部分,其配置为响应于控制节点的高电压,使用时钟信号的高电压输出第n门信号的高电压;控制下拉部分 被配置为响应于从第n级的下一级中的至少一级输出的进位信号将控制节点的电压下拉到低电压并且接收与低电压相对应的反偏压,以及 携带部件被配置成响应于控制节点的高电压而输出时钟信号的高电压作为第n进位信号。
    • 10. 发明授权
    • Display panel and method of manufacturing the same
    • 显示面板及其制造方法
    • US09171932B2
    • 2015-10-27
    • US13951992
    • 2013-07-26
    • Samsung Display Co., Ltd.
    • Se-Hyoung ChoChong-Chul ChaiMee-Hye Jung
    • H01L29/786H01L29/66H01L29/417H01L27/12
    • H01L29/66742H01L27/1222H01L27/1225H01L27/124H01L27/1248H01L29/41733
    • A display panel includes a gate line, a gate electrode, a planarization layer, a gate insulation layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode. The gate electrode extends from the gate line. The planarization layer covers the gate line and the gate electrode to have an opening exposing a portion of the gate electrode formed therethrough. The gate insulation layer covers a portion of the gate electrode exposed by the opening and the planarization layer. The active layer is formed on the gate insulation layer and corresponds to the gate electrode. The data line is formed. The source electrode extends from the data line to cover a portion of the opening. The drain electrode is spaced apart from the source electrode and covers a portion of the opening. The pixel electrode is connected to the drain electrode.
    • 显示面板包括栅极线,栅电极,平坦化层,栅极绝缘层,有源层,数据线,源电极,漏电极和像素电极。 栅电极从栅极线延伸。 平坦化层覆盖栅极线和栅电极以具有暴露通过其形成的栅电极的一部分的开口。 栅极绝缘层覆盖由开口和平坦化层暴露的栅电极的一部分。 有源层形成在栅绝缘层上,对应于栅电极。 形成数据线。 源极从数据线延伸以覆盖开口的一部分。 漏电极与源电极间隔开并覆盖开口的一部分。 像素电极连接到漏电极。