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    • 3. 发明申请
    • METHOD OF FABRICATING AN INTEGRATED CIRCUIT USING SELF-PATTERNED THIN FILMS
    • 使用自制薄膜制作集成电路的方法
    • WO1998005071A1
    • 1998-02-05
    • PCT/US1997013483
    • 1997-07-25
    • SYMETRIX CORPORATION
    • SYMETRIX CORPORATIONUCHIDA, HirotoSOYAMA, NobuyukiOGI, KatsumiSCOTT, Michael, C.CUCHIARO, Joseph, D.MCMILLAN, Larry, D.PAZ DE ARAUJO, Carlos, A.
    • H01L27/115
    • H01L27/11502H01L28/55
    • A first photosensitive liquid solution is applied to a substrate (21, 105, 125, 155, 188, 255), patterned through exposure to radiation and development, and annealed to form a layered superlattice material (34, 34A, 34B, 34D, 106, 126, 157, 176, 256, 286, 434) that is incorporated into a component (30, 30A, 30B, 30D, 101, 121, 330) of an integrated circuit (50, 60, 64, 70). Fabrication processes are designed to protect the self-patterned material from conventional IC processing and to protect the conventional materials, such as silicon, from elements in the self-patterned layered superlattice material. In one embodiment, a layer of bismuth oxide (158) is formed on SrBi2Ta2O9 (156) and a silicon oxide hole (162) is etched to the bismuth oxide. The bismuth oxide protects the SrBi2Ta2O9 from the etchant, and is reduced by the etchant to bismuth. Any remaining bismuth oxide and much of the bismuth are vaporized in the anneal, and the remaining bismuth is incorporated into the SrBi2Ta2O9. In another embodiment, a transitor (22) on a silicon substrate is covered by an insulating layer (31). A conducting plug (38) passes through the insulating layer to the transistor drain (24). The bottom electrode (32) of a layered superlattice material capacitor (30) directly overlies the plug and contacts the plug. The layered superlattice material completely overlies the transistor. A self-patterned sacrificial layer (40) completely overlies the layered superlattice material. The bottom electrode of the capacitor is completely enclosed by the layered superlattice material, the insulting layer, and the conducting plug.
    • 将第一感光性液体溶液施加到通过暴露于辐射和显影而图案化的基板(21,105,125,155,188,255),并且退火以形成分层超晶格材料(34,34A,34B,34D,106 ,126,157,176,256,286,434),其被集成到集成电路(50,60,64,70)的组件(30,30A,30B,30D,101,121,330)中。 设计制造工艺以保护自组装图案材料免于常规IC处理,并且保护常规材料(例如硅)免受自图形分层超晶格材料中的元素的影响。 在一个实施例中,在SrBi 2 Ta 2 O 9(156)上形成氧化铋层(158),氧化铋蚀刻氧化硅孔(162)。 氧化铋保护SrBi2Ta2O9与蚀刻剂的相互作用,并被腐蚀剂还原成铋。 任何剩余的氧化铋和大部分铋在退火过程中被蒸发,剩余的铋掺入到SrBi2Ta2O9中。 在另一个实施例中,硅衬底上的过渡器(22)被绝缘层(31)覆盖。 导电插头(38)穿过绝缘层到晶体管漏极(24)。 分层超晶格材料电容器(30)的底部电极(32)直接覆盖在插头上并接触插头。 分层超晶格材料完全覆盖晶体管。 自图案化牺牲层(40)完全覆盖层状超晶格材料。 电容器的底部电极被层状超晶格材料,绝缘层和导电插塞完全封闭。