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2. 发明公开

EP1677175A2 Dynamic power management in system on chips (SOC) 有权转让
标题翻译： Dynamische Leistungsverwaltung系统级芯片（SOC）
公开(公告)号：EP1677175A2
公开(公告)日：2006-07-05
申请号：EP05113079.7
申请日：2005-12-29
申请人： STMicroelectronics Pvt. Ltd
发明人： Uguen, Laurent , Dhiman, Gaurav , Kapoor, Gaurav
IPC分类号： G06F1/32
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/3287 , Y02D10/128 , Y02D10/171 , Y02D50/20
摘要： A system for dynamic power management in a distributed architecture system on chip, comprising a means for dynamically defining the feasibility of entering a low power mode of operation based on the status of components of the system, a means for entering or exiting safely from a low power state based on said feasibility, a means for decreasing the power centric communication between various processors and a means for increasing the low power mode time. Thus a framework is proposed in the instant invention wherein all the device drivers dynamically maintain the information on the feasibility of a low power transition at any point of time. Thus whenever an opportunity to enter a low power mode comes up one has to just check this feasibility variable to determine whether the low power mode entry is viable or not. For ensuring the safe transition to a low power mode, a stalling machine is proposed in case of DSPs. For further saving power, a power centric communication channel is established between various processors and to reduce the load on this communication channel techniques like quad-ring buffer and DSP feedback are proposed.
摘要翻译：一种用于分布式架构系统中的动态功率管理的系统，包括用于基于所述系统的部件的状态动态地定义进入低功率操作模式的可行性的装置，用于从低速进入或退出安全的装置基于所述可行性的功率状态，用于减小各种处理器之间的功率中心通信的手段和用于增加低功率模式时间的手段。因此，在本发明中提出了一种框架，其中所有设备驱动程序在任何时间点动态地维护关于低功率转换的可行性的信息。因此，每当有机会进入低功耗模式时，只能检查这个可行性变量来确定低功耗模式输入是否可行。为了确保安全地转换到低功耗模式，在DSP的情况下，提出了一种停滞的机器。为了进一步节约能源，在各种处理器之间建立了一个以电力为中心的通信通道，并且减少了这种通信信道的负载，如四环缓冲器和DSP反馈。

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