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1. 发明专利

DE69325191T2 未知
公开(公告)号：DE69325191T2
公开(公告)日：1999-12-16
申请号：DE69325191
申请日：1993-02-11
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： H04N5/92 , H04N5/783 , H04N5/926 , H04N5/937 , H04N5/945 , H04N5/93 , H04N5/94
摘要： A picture enhancing circuit including reproducing means, a field memory 14 and writing means. The reproducing means reproduces a field signal comprising fields each containing a plurality of sync blocks each constituted by sync data and picture data. The writing means writes the output of the reproducing means to the field memory 14 in units of sync blocks, the picture data being written to the memory 14 along with the sync data whose contents are reset. When sync blocks are read from the field memory 14 the contents of the sync data are updated. The contents of the sync data indicate the number of times that data has been read and thus its age and the data can be used or interpolated depending on its age.

2. 发明公开

EP1014726A4 ENCODER AND ENCODING METHOD 审中-公开
标题翻译： KODER编码方式
公开(公告)号：EP1014726A4
公开(公告)日：2001-05-09
申请号：EP99926833
申请日：1999-06-29
申请人： SONY CORP
发明人： UEHARA KENJI , MURAKAMI YOSHIHIRO , FUNADO SHIGETO , MATSUNAGA OSAMU , FUJISHIRO SHIGEO
IPC分类号： H04N19/119 , H04N19/132 , H04N19/139 , H04N19/149 , H04N19/177 , H04N19/196 , H04N19/423 , H04N19/50 , H04N19/51 , H04N19/59 , H04N19/61 , H04N19/625 , H04N19/85 , H04N19/91 , H04N19/94 , H04N7/32 , H04N7/26 , H04N7/36 , H04N7/46 , H04N7/50
CPC分类号： H04N19/59 , H04N19/105 , H04N19/117 , H04N19/124 , H04N19/139 , H04N19/149 , H04N19/152 , H04N19/172 , H04N19/176 , H04N19/182 , H04N19/50 , H04N19/51 , H04N19/61 , H04N19/80
摘要： An encoder in which a video signal is subjected to signal processing by a signal processing circuit and to motion compensation, differential data generated by the motion compensation is subjected to orthogonal transformation to generated coefficient data, encoded data is generated by quantizing the coefficient data, and the quantization step size for quantization is changed according to the amount of encoded data generated, the signal processing circuit being provided with moving vector detecting means for detecting a moving vector of the video signal, motion vector amount-of-codes measuring means for calculating the amount of codes of the moving vector based on the moving vector, coefficient data number-of-codes measuring means for measuring the amount of codes of the coefficient data, and number-of-pixels changing means for changing the number of pixels of the video signal according to the amount of codes of the moving vector and the amount of codes of the coefficient data.

3. 发明公开

EP0767586A4 DEVICE AND METHOD FOR CODING MOVING IMAGE 失效
标题翻译：装置和动态图像ENCODE方法
公开(公告)号：EP0767586A4
公开(公告)日：2000-08-09
申请号：EP96910209
申请日：1996-04-19
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： H04N19/50 , G06T9/00 , H04N19/124 , H04N19/152 , H04N19/196 , H04N19/423 , H04N19/46 , H04N19/503 , H04N19/51 , H04N19/577 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/91 , H04N7/24
CPC分类号： H04N19/577 , H04N19/61
摘要： The period M of the pictures whose picture coding type is I or P during video input changes from 2 to 3 and vice versa. The CUR_M represents the present M number and the maximum M number MAX_M in a sequence is 3. A MAX_M frame delay is given to the pictures (1B, 2B, and so on) whose picture coding type is B and a MAX_M-CUR_M frame delay is given to the pictures (1I, 2I, and so on) whose picture coding type is I. Thus, a bit stream is formed by generating a coding order sequence and performing predictive coding.

4. 发明专利

DE69325191D1 未知
公开(公告)号：DE69325191D1
公开(公告)日：1999-07-15
申请号：DE69325191
申请日：1993-02-11
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： H04N5/92 , H04N5/783 , H04N5/926 , H04N5/937 , H04N5/945 , H04N5/93 , H04N5/94
摘要： A picture enhancing circuit including reproducing means, a field memory 14 and writing means. The reproducing means reproduces a field signal comprising fields each containing a plurality of sync blocks each constituted by sync data and picture data. The writing means writes the output of the reproducing means to the field memory 14 in units of sync blocks, the picture data being written to the memory 14 along with the sync data whose contents are reset. When sync blocks are read from the field memory 14 the contents of the sync data are updated. The contents of the sync data indicate the number of times that data has been read and thus its age and the data can be used or interpolated depending on its age.

5. 发明专利

JPH10285547A RECORDING AND REPRODUCING DEVICE AND METHOD 失效
公开(公告)号：JPH10285547A
公开(公告)日：1998-10-23
申请号：JP8510297
申请日：1997-04-03
申请人： SONY CORP
发明人： HENMI FUMIAKI , KANI TETSUO , MURAKAMI YOSHIHIRO , INOUE TAKAO , KOSUGE SHOJI , KAWAHARA MINORU , TOYOSHIMA MAKOTO , UEHARA KENJI
IPC分类号： H04N5/92 , H04N5/7826 , H04N9/79 , H04N9/797 , H04N9/804 , H04N9/808
摘要： PROBLEM TO BE SOLVED: To easily correct the non-continuous point even when a non-continuous line is generated in video signals. SOLUTION: A line number LN transmitted in serial data based on the S-004 standard of BTA is extracted and inserted as LN0 and LN1 to the luminance signals Y and color difference signals Pr/Pb of 4:2:2 signals respectively (A). The 4:2:2 signals are turned to 3:1:1 signals by a band compression means, rearranged to the signals Ch0 and Ch1 of the two channels of the same form further and turned to a 46.40625 MHz rate (B). Succeeding processings are performed at the rate. The line number LN is inserted to the head of one horizontal cycle as LN0 and LN1 . Since the line number LN is inserted to the signals, even when non-continuity is generated in the line, it is easily corrected. Also, since the signals are turned to the same form in Ch0 and Ch1, an ASIC to be used is made common.

6. 发明专利

JPH10136362A DATA COMPRESSOR AND DIGITAL VIDEO SIGNAL PROCESSOR 失效
公开(公告)号：JPH10136362A
公开(公告)日：1998-05-22
申请号：JP28682596
申请日：1996-10-29
申请人： SONY CORP
发明人： UEHARA KENJI , TODO SUSUMU
IPC分类号： H04N5/92 , H03M7/40 , H04N1/41 , H04N19/126 , H04N19/134 , H04N19/136 , H04N19/46 , H04N19/60 , H04N19/625 , H04N19/70 , H04N19/80 , H04N19/85 , H04N19/88 , H04N19/91 , H04N19/93 , H04N7/30
摘要： PROBLEM TO BE SOLVED: To prevent deterioration in image quality resulting from a bit rate of variable length coding data getting smaller than an object rate. SOLUTION: Discrete cosine transformation processing is applied to an input video signal and quantization processing and variable length coding processing are applied to coefficient data (DCT COEFs) to compress data. A binary search circuit 123a is used to obtain a quantization index Fn decided to set a bit rate of the variable length coding data to be an object value. A back search circuit 123b is used to correct quantization index Fn with preceding quantization index information to coefficient data to obtain a quantization index SF. When the input video signal is processed of filter processing or the like after data expansion processing, a quantization index selection section 123c selects the quantization index Fn by using a quantization index QI specifying a quantization step based on the data processing information PF and does not select the quantization index SF.

7. 发明专利

JPH02241272A SYNCHRONIZING SIGNAL SEPARATION CIRCUIT 失效
公开(公告)号：JPH02241272A
公开(公告)日：1990-09-25
申请号：JP6258789
申请日：1989-03-15
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： H04N5/08 , H04N9/44
摘要： PURPOSE:To realize the separation of a synchronizing signal through the constitution of less hardware and in addition, through the constitution suitable for being made into an IC by providing a reference data generator to generate plural digital reference data, a selector to select the reference data on the basis of a line address, and a comparator to compare the selected digital reference data with a digital video signal. CONSTITUTION:Now, when the digital video signal is inputted while the selector 4 is kept in a state to select an optional terminal to be selected, the digital video signal and the optional digital reference data are compared by the comparator 1, and a horizontal synchronizing signal, etc., is outputted. Then, when a first vertical synchronizing signal is outputted, a vertical synchronizing signal selector 3 detects it, and a counter 2 is reset. Then, since the counter 2 outputs a pulse from its Q1-terminal, and the selector 4 selects the terminal R1 to be selected, the digital reference data R1 is supplied to the comparator 1. The comparator 1 compares this digital reference data R1 and the digital video signal.

8. 发明专利

JPH06301912A DIGITAL DATA REPRODUCING APPARATUS 失效
公开(公告)号：JPH06301912A
公开(公告)日：1994-10-28
申请号：JP9026293
申请日：1993-04-16
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： G11B5/09 , G11B20/18
摘要： PURPOSE:To prevent the deterioration of picture quality at the time of high- speed reproduction by providing reproducing heads on advance side and confidence side, by providing two necessary and minimum reproduction system in the manner of corresponding to these reproducing heads, by monitoring the state of an error flag from each inner-code decoder and by discriminating data in which the flag has not been able to be erected. CONSTITUTION:Reproducing heads or recording and reproducing heads 10a, 10b are respectively provided on advance side and confidence side and two necessary and minimum reproduction systems are provided in the manner of corresponding to these heads, while the state of error flag from inner-code decoders 22, 22c is monitored by an error discrimination circuit 25. At that time, data, in which no error flag has been erected, is selected by a data selector 26, while any one-side data and error flag are supplied to an outer-code decoder 27 when the flag is erected in both data. At the time of high-speed reproduction such as shuttle reproduction, thus, data higher in correlativity than those obtained at the time of using one head are obtained and the data becoming no error are outputted.

9. 发明专利

JPH05227508A PICTURE RECOGNITION DEGREE IMPROVING CIRCUIT 失效
公开(公告)号：JPH05227508A
公开(公告)日：1993-09-03
申请号：JP2500192
申请日：1992-02-12
申请人： SONY CORP
发明人： UEHARA KENJI
IPC分类号： H04N5/92 , H04N5/783 , H04N5/926 , H04N5/937 , H04N5/945
摘要： PURPOSE:To attain a cost down by making a field memory to be a shared memory constitution. CONSTITUTION:A field signal whose one filed is constituted of plural sink blocks which are respectively constituted of sink data and picture data, is reproduced, and the reproduction output and the picture data are written in a field memory 14 by using one sink block as a unit while the data content of the sink data are rest. At the time of reading the data from the field memory 14 by using one sink block as the unit, when the sink block is not reloaded with the data of the new reproduced sink block, only the data content of the sink data is updated and the sink data are rewritten each time picture data are read, the interpolating processing of the read picture data is operated as necessary, and the recognition degree of the reproduced picture at the time of a variable speed reproduction can be improved.

10. 发明专利

JP2010219983A Image processing apparatus and method 有权
标题翻译：图像处理装置和方法
公开(公告)号：JP2010219983A
公开(公告)日：2010-09-30
申请号：JP2009065584
申请日：2009-03-18
申请人： Sony Corp , ソニー株式会社
发明人： KOYABU KYOHEI , FUCHIE TAKAAKI , UEHARA KENJI
IPC分类号： H04N5/76 , G11B20/10 , H04N5/93 , H04N7/173 , H04N19/00 , H04N19/423 , H04N19/44 , H04N19/46 , H04N19/503 , H04N19/70 , H04N19/91 , H04N21/44
CPC分类号： H04N19/44 , G11B27/005 , G11B27/3027 , H04N7/24 , H04N21/4307 , H04N21/4325 , H04N21/4385 , H04N21/44004 , H04N21/44008
摘要： PROBLEM TO BE SOLVED: To improve responsiveness to special playback of stream data. SOLUTION: An input analysis section 10 extracts a slice header, SPS and PPS beforehand for inputted stream data, stores the stream data in a picture information region 21 and also simultaneously stores the SPS and PPS in an SPS region 22 and a PPS region 23 respectively. The slice header, SPS and PPS contain data required for picture order count (POC) calculation and decoded picture buffer (DPB) list creation. Based on the slice header, SPS and PPS extracted by the input analysis section 10, a CPU 9 performs POC calculation and DPB list creation. A decoder 11 applies decode processing based on a DPB list created beforehand. The present invention may be applicable to MPEG4 Part10:AVC (advanced video coding) stream data playback devices. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高对流数据的特殊播放的响应能力。解决方案：输入分析部分10预先提取用于输入流数据的片标头SPS和PPS，将流数据存储在图像信息区域21中，并且还将SPS和PPS同时存储在SPS区域22和PPS中区域23。片头，SPS和PPS包含图像顺序计数（POC）计算和解码图像缓冲（DPB）列表创建所需的数据。基于由输入分析部10提取的片标题SPS和PPS，CPU9执行POC计算和DPB列表创建。解码器11基于预先创建的DPB列表应用解码处理。本发明可以适用于MPEG4 Part10：AVC（高级视频编码）流数据重放设备。版权所有（C）2010，JPO＆INPIT

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