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1. 发明申请

WO2016120122A1 METHOD, DEVICE AND SYSTEM FOR MEASURING AN ELECTRICAL CHARACTERISTIC OF A SUBSTRATE 审中-公开
标题翻译：用于测量基板电气特性的方法，装置和系统
公开(公告)号：WO2016120122A1
公开(公告)日：2016-08-04
申请号：PCT/EP2016/050977
申请日：2016-01-19
申请人： SOITEC , UNIVERSITE CATHOLIQUE DU LOUVAIN
发明人： MALAQUIN, Cédric , RASKIN, Jean-Pierre , DESBONNETS, Eric
IPC分类号： G01R31/26 , G01R31/28
CPC分类号： G01R31/2822 , G01R29/0878 , G01R29/12 , G01R31/2648 , G01R31/2831 , G01R31/2887 , G01R31/2889
摘要： The invention relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical structure. The invention relates also to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.
摘要翻译：本发明涉及一种用于测量基板的电气特性的装置，包括由具有轴承表面的电介质材料制成的支撑件，该支撑件包括具有与支撑件的支承表面齐平的接触表面的电气测试结构，的电气结构的接触表面适于与衬底紧密接触。测量装置还包括形成在支撑件的另一表面上并电连接到电气结构的至少一个连接凸块接触。本发明还涉及用于表征基板的系统和用于测量使用测量装置的基板的特性的方法。

2. 发明公开

EP3249683A1 PROCESS FOR THE MANUFACTURE OF A HIGH RESISTIVITY SEMICONDUCTOR SUBSTRATE 有权
标题翻译：制造高电阻率半导体衬底的工艺
公开(公告)号：EP3249683A1
公开(公告)日：2017-11-29
申请号：EP17171861.2
申请日：2017-05-19
申请人： Soitec
发明人： MALAQUIN, Cédric , ECARNOT, Ludovic , PARISSI, Damien
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： The present invention relates to a process for the manufacture of a high resistivity semiconductor substrate, comprising the following stages: providing a first substrate (101) with an in-depth weakened layer (102); providing a second substrate (103) with a layer of an oxide (104) at the surface; attaching the first substrate (101) to the second substrate (103) so as to form a compound substrate (105) comprising a layer of buried oxide (104); and cleaving the compound substrate (105) at the level of the weakened layer (102). The process additionally comprises at least one stage of stabilization, in particular a stabilization heat treatment, of the second substrate (103) with the layer of oxide (104) before the stage of cleaving at the level of the weakened layer (102).
摘要翻译：本发明涉及一种制造高电阻率半导体衬底的方法，包括以下步骤：提供具有深度弱化层（102）的第一衬底（101）; 在所述表面处提供第二衬底（103），所述第二衬底（103）具有氧化物（104）层; 将所述第一衬底（101）附接到所述第二衬底（103）以形成包括埋入氧化物层（104）的复合衬底（105）; 以及在弱化层（102）的水平面处切割复合基板（105）。该方法另外包括至少一个第二衬底（103）的稳定化阶段，特别是稳定化热处理，其在弱化层（102）的水平面处进行劈裂阶段之前具有氧化物层（104）。

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