专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

AU7202496A Transition-controlled digital encoding and signal transmission system 未知
公开(公告)号：AU7202496A
公开(公告)日：1997-04-28
申请号：AU7202496
申请日：1996-09-30
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE DAVID D
IPC分类号： H03M7/14 , H04L7/00 , H04L7/04 , H04L25/03 , H04L25/08 , H04L25/49 , H04N7/083 , H04N7/52 , H03M5/14
摘要： A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

2. 发明专利

CA2233709C BLOCK CODING FOR DIGITAL VIDEO TRANSMISSION 未知
公开(公告)号：CA2233709C
公开(公告)日：2001-07-31
申请号：CA2233709
申请日：1996-10-01
申请人： SILICON IMAGE INC
发明人： LEE DAVID D , KIM SUNGJOON , LEE KYEONGHO , SHIN YESHIK
IPC分类号： H04N7/08 , G09G3/20 , G09G5/00 , H03M5/14 , H03M7/14 , H04L7/00 , H04L7/04 , H04L25/02 , H04L25/08 , H04L25/49 , H04N7/081 , H04N7/083 , H04N7/52 , H04N21/2368 , H04N21/434 , H04N7/00 , H04N5/38 , H04N5/44
摘要： The transmission of digital video data is accomplished using a block coding scheme, which embeds timing and control signals into the data stream. The co de is DC balanced, achieved by selectively inverting some data blocks, as a function of the cumulative disparity; and the transitions within each block are controlled, providing either a minimum number of transitions per block, or a maximum, and this is achieved by selectively inverting certain bits within a block. The use of low-swing differential transmission minimizes electromagnetic interference (EMI).

3. 发明专利

CA2233906A1 TRANSITION-CONTROLLED DIGITAL ENCODING AND SIGNAL TRANSMISSION SYSTEM 未知
公开(公告)号：CA2233906A1
公开(公告)日：1997-04-10
申请号：CA2233906
申请日：1996-09-30
申请人： SILICON IMAGE INC
发明人： KIM SUNGJOON , LEE KYEONGHO , SHIN YESHIK , LEE DAVID D
IPC分类号： H03M7/14 , H04L7/00 , H04L7/04 , H04L25/03 , H04L25/08 , H04L25/49 , H04N7/083 , H04N7/52 , H03M7/00 , H04L25/00 , H04L25/02 , H04N5/38
摘要： A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

4. 发明专利

DE69626211T2 未知
公开(公告)号：DE69626211T2
公开(公告)日：2004-02-19
申请号：DE69626211
申请日：1996-10-01
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE D
IPC分类号： H04N7/08 , G09G3/20 , G09G5/00 , H03M5/14 , H03M7/14 , H04L7/00 , H04L7/04 , H04L25/02 , H04L25/08 , H04L25/49 , H04N7/081 , H04N7/083 , H04N7/52 , H04N21/2368 , H04N21/434
摘要： A new high-speed digital interface for transmitting video information over various transmission media including terminated copper wires such as twisted-pair wires and fiber optical cable is described. The significance of this new interface is that (1) it only uses a small number of data channels with all timing and control data embedded in data transmission, (2) it uses a transition controlled binary DC balanced coding for reliable, low-power and high-speed data transmission, (3) it uses low-swing differential voltage which minimizes EMI, and (4) it can be implemented in low-cost scaleable CMOS technology as a megacell or standard IC. The high-speed digital interface incorporates a method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

5. 发明专利

DE69619560T2 未知
公开(公告)号：DE69619560T2
公开(公告)日：2002-10-24
申请号：DE69619560
申请日：1996-09-30
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE DAVID
IPC分类号： H03M7/14 , H04L7/00 , H04L7/04 , H04L25/03 , H04L25/08 , H04L25/49 , H04N7/083 , H04N7/52
摘要： A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

6. 发明专利

AU7203796A Block coding for digital video transmission 未知
公开(公告)号：AU7203796A
公开(公告)日：1997-04-28
申请号：AU7203796
申请日：1996-10-01
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE DAVID D
IPC分类号： H04N7/08 , G09G3/20 , G09G5/00 , H03M5/14 , H03M7/14 , H04L7/00 , H04L7/04 , H04L25/02 , H04L25/08 , H04L25/49 , H04N7/081 , H04N7/083 , H04N7/52 , H04N21/2368 , H04N21/434
摘要： A new high-speed digital interface for transmitting video information over various transmission media including terminated copper wires such as twisted-pair wires and fiber optical cable is described. The significance of this new interface is that (1) it only uses a small number of data channels with all timing and control data embedded in data transmission, (2) it uses a transition controlled binary DC balanced coding for reliable, low-power and high-speed data transmission, (3) it uses low-swing differential voltage which minimizes EMI, and (4) it can be implemented in low-cost scaleable CMOS technology as a megacell or standard IC. The high-speed digital interface incorporates a method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

7. 发明专利

CA2233906C TRANSITION-CONTROLLED DIGITAL ENCODING AND SIGNAL TRANSMISSION SYSTEM 未知
公开(公告)号：CA2233906C
公开(公告)日：2005-09-20
申请号：CA2233906
申请日：1996-09-30
申请人： SILICON IMAGE INC
发明人： LEE KYEONGHO , KIM SUNGJOON , SHIN YESHIK , LEE DAVID D
IPC分类号： H03M7/14 , H04L7/00 , H04L7/04 , H04L25/03 , H04L25/08 , H04L25/49 , H04N7/083 , H04N7/52 , H03M7/00 , H04L25/00 , H04L25/02 , H04N5/38
摘要： A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectivel y complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemente d data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one o f the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined numb er of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

8. 发明专利

DE69626211D1 未知
公开(公告)号：DE69626211D1
公开(公告)日：2003-03-20
申请号：DE69626211
申请日：1996-10-01
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE D
IPC分类号： H04N7/08 , G09G3/20 , G09G5/00 , H03M5/14 , H03M7/14 , H04L7/00 , H04L7/04 , H04L25/02 , H04L25/08 , H04L25/49 , H04N7/081 , H04N7/083 , H04N7/52 , H04N21/2368 , H04N21/434
摘要： A new high-speed digital interface for transmitting video information over various transmission media including terminated copper wires such as twisted-pair wires and fiber optical cable is described. The significance of this new interface is that (1) it only uses a small number of data channels with all timing and control data embedded in data transmission, (2) it uses a transition controlled binary DC balanced coding for reliable, low-power and high-speed data transmission, (3) it uses low-swing differential voltage which minimizes EMI, and (4) it can be implemented in low-cost scaleable CMOS technology as a megacell or standard IC. The high-speed digital interface incorporates a method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

9. 发明专利

DE69619560D1 未知
公开(公告)号：DE69619560D1
公开(公告)日：2002-04-04
申请号：DE69619560
申请日：1996-09-30
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE DAVID
IPC分类号： H03M7/14 , H04L7/00 , H04L7/04 , H04L25/03 , H04L25/08 , H04L25/49 , H04N7/083 , H04N7/52
摘要： A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

10. 发明专利

CA2233709A1 BLOCK CODING FOR DIGITAL VIDEO TRANSMISSION 未知
公开(公告)号：CA2233709A1
公开(公告)日：1997-04-10
申请号：CA2233709
申请日：1996-10-01
申请人： SILICON IMAGE INC
发明人： SHIN YESHIK , LEE KYEONGHO , KIM SUNGJOON , LEE DAVID D
IPC分类号： H04N7/08 , G09G3/20 , G09G5/00 , H03M5/14 , H03M7/14 , H04L7/00 , H04L7/04 , H04L25/02 , H04L25/08 , H04L25/49 , H04N7/081 , H04N7/083 , H04N7/52 , H04N21/2368 , H04N21/434 , H04N7/00 , H04N5/38 , H04N5/44
摘要： The transmission of digital video data is accomplished using a block coding scheme, which embeds timing and control signals into the data stream. The code is DC balanced, achieved by selectively inverting some data blocks, as a function of the cumulative disparity; and the transitions within each block are controlled, providing either a minimum number of transitions per block, or a maximum, and this is achieved by selectively inverting certain bits within a block. The use of low-swing differential transmission minimizes electromagnetic interference (EMI).

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式