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    • 1. 发明申请
    • MANUFACTURING METHOD FOR HIGH CAPACITANCE CAPACITOR STRUCTURE
    • 高容量电容器结构的制造方法
    • US20130252397A1
    • 2013-09-26
    • US13476251
    • 2012-05-21
    • SHIN-BIN HUANGCHENG-YEH HSUCHUNG-LIN HUANG
    • SHIN-BIN HUANGCHENG-YEH HSUCHUNG-LIN HUANG
    • H01L21/02
    • H01L28/91
    • A manufacturing method of a capacitor structure is provided, which includes the steps of: on a substrate having a first oxide layer, (a) forming a first suspension layer on the first oxide layer; (b) forming a first shallow trench into the first oxide layer above the substrate; (c) forming a second oxide layer filling the first shallow trench; (d) forming a second suspension layer on the second oxide layer; (e) forming a second shallow trench through the second suspension layer into the second oxide layer above the first suspension layer; (f) forming at least one deep trench on the bottom surface of the second shallow trench through the second and the first oxide layers, (g) forming an electrode layer on the inner surface of the deep trench; and (h) removing the first and second oxide layers through the trench openings in the first and the second suspension layers.
    • 提供一种电容器结构的制造方法,其包括以下步骤:在具有第一氧化物层的衬底上,(a)在第一氧化物层上形成第一悬浮层; (b)在衬底上方的第一氧化物层中形成第一浅沟槽; (c)形成填充所述第一浅沟槽的第二氧化物层; (d)在第二氧化物层上形成第二悬浮层; (e)通过所述第二悬浮层形成穿过所述第一悬浮层上方的所述第二氧化物层的第二浅沟槽; (f)通过第二和第一氧化物层在第二浅沟槽的底表面上形成至少一个深沟槽,(g)在深沟槽的内表面上形成电极层; 和(h)通过第一和第二悬浮层中的沟槽开口去除第一和第二氧化物层。
    • 2. 发明申请
    • METHOD FOR MANUFACTURING CAPACITOR LOWER ELECTRODES OF SEMICONDUCTOR MEMORY
    • 制造电容器半导体存储器下部电极的方法
    • US20110092044A1
    • 2011-04-21
    • US12699399
    • 2010-02-03
    • SHIN-BIN HUANGTZUNG-HAN LEECHUNG-LIN HUANG
    • SHIN-BIN HUANGTZUNG-HAN LEECHUNG-LIN HUANG
    • H01L21/02
    • H01L28/92
    • A method for manufacturing capacitor lower electrodes includes a dielectric layer, a first silicon nitride layer and a hard mask layer; partially etching the hard mask layer, the first silicon nitride layer and the dielectric layer to form a plurality of concave portions; depositing a second silicon nitride layer onto the hard mask layer and into the concave portions; partially etching the second silicon nitride layer, the hard mask layer and the dielectric layer to form a plurality of trenches; forming a capacitor lower electrode within each trench and partially etching the first silicon nitride layer, the second silicon nitride layer, the dielectric layer and the capacitor lower electrodes to form an etching area; and etching and removing the dielectric layer from the etching area, thereby a periphery of each capacitor lower electrode is surrounded and attached to by the second silicon nitride layer.
    • 制造电容器下电极的方法包括电介质层,第一氮化硅层和硬掩模层; 部分地蚀刻硬掩模层,第一氮化硅层和电介质层以形成多个凹部; 在所述硬掩模层上沉积第二氮化硅层并进入所述凹部; 部分蚀刻第二氮化硅层,硬掩模层和电介质层以形成多个沟槽; 在每个沟槽内形成电容器下电极,并部分地蚀刻第一氮化硅层,第二氮化硅层,电介质层和电容器下电极以形成蚀刻区域; 并且从蚀刻区域蚀刻除去电介质层,由此每个电容器下电极的周围被第二氮化硅层包围并附着。