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1. 发明授权

EP0417328B1 CLOCK GENERATOR 失效
标题翻译：时钟信号发生器
公开(公告)号：EP0417328B1
公开(公告)日：1997-02-12
申请号：EP90905658.2
申请日：1990-03-28
申请人： SHARP KABUSHIKI KAISHA
发明人： HIRAMATSU, Yonejirou , SATOU, Shun-ichi
IPC分类号： H04N5/95 , G11B20/02
CPC分类号： G11B20/02 , H04N5/935 , H04N5/956 , H04N9/896
摘要： The clock generator includes a quartz oscillator (1) which generates clock signals that pass through a band-pass filter (2) which form sinusoidal reference clock signals. The clock signals are fed to a multiplier (3), and delayed by one-fourth period through a one-fourth period delay unit (4) to form clock signals cos 2πfct which are then applied to a multiplier (5). When a horizontal synchronizing signal is introduced from an external unit, an A/D converter (6) samples the reference clock signal with the horizontal synchronizing signal and sends a digital signal to an operation unit (7) which operates a phase difference between an absolute phase of the digital signal and a predetermined phase, and produces a sinusoidal wave component sin (a-b) and a cosine wave component cos (a-b) that correspond to the phase difference. The multiplier multiplies the reference clock signal sin 2πfct by the sinusoidal wave component sin (a-b), and the multiplier (5) multiplies the cosine clock signal cos 2πfct by the cosine wave component cos (a-b). These multiplied results are added up together through an adder (9), and the sum is converted into a binary value through a comparator (12) which then produces an output clock pulse W.CK.

2. 发明公开

EP0419680A1 FREQUENCY MODULATOR 失效
标题翻译： FREQUENZMODULATOR。
公开(公告)号：EP0419680A1
公开(公告)日：1991-04-03
申请号：EP90905677.2
申请日：1990-04-06
申请人： SHARP KABUSHIKI KAISHA
发明人： HIRAMATSU, Yonejirou , SATOU, Shun-ichi
IPC分类号： H03C3/00 , G11B20/06
CPC分类号： G11B20/06 , H03C3/00
摘要： A frequency-modulated signal is digitally integrated through an integration circuit (20) and is phase modulated through a phase-modulating circuit (30). The modulated signal that is integrated is converted through the phase-modulating circuit (30) into first and second digital modulated signals whose phases are orthogonal to each other. Further, a carrier signal from a carrier signal generating circuit (40) is converted into first and second carrier signals whose phases are also orthogonal to each other. The first digital modulated signal is multiplied by the first carrier signal through D/A converter (35); the second digital modulated signal is multiplied by the second carrier signal through a D/A converter (36). The two resultant signals are outputted as analog signals, and are added to each other through an adder (37), thereby to output a frequency-modulated signal. Because of the digital processing, the frequency modulator can have exellent linear characteristics, little harmonic distortion, and high reliability.
摘要翻译：频率调制信号通过积分电路（20）进行数字积分，并通过相位调制电路（30）进行相位调制。积分的调制信号通过相位调制电路（30）转换为相位彼此正交的第一和第二数字调制信号。此外，来自载波信号发生电路（40）的载波信号被转换成相位彼此正交的第一和第二载波信号。第一数字调制信号通过D / A转换器（35）乘以第一载波信号; 第二数字调制信号通过D / A转换器（36）与第二载波信号相乘。两个合成信号作为模拟信号输出，并通过加法器（37）彼此相加，从而输出调频信号。由于数字处理，频率调制器可以具有很强的线性特性，谐波失真小，可靠性高。

3. 发明授权

EP0419680B1 FREQUENCY MODULATOR 失效
标题翻译： FREQUENZMODULATOR。
公开(公告)号：EP0419680B1
公开(公告)日：1993-11-24
申请号：EP90905677.2
申请日：1990-04-06
申请人： SHARP KABUSHIKI KAISHA
发明人： HIRAMATSU, Yonejirou , SATOU, Shun-ichi
IPC分类号： H03C3/00 , G11B20/06
CPC分类号： G11B20/06 , H03C3/00
摘要： A frequency-modulated signal is digitally integrated through an integration circuit (20) and is phase-modulated through a phase-modulating circuit (30). The modulated signal that is integrated is converted through the phase-modulating circuit (30) into first and second digital modulated signals whose phases are orthogonal to each other. Further, a carrier signal from a carrier signal generating circuit (40) is converted into first and second carrier signals whose phases are also orthogonal to each other. The first digital modulated signal is multiplied by the first carrier signal through a D/A converter (35); the second digital modulated signal is multiplied by the second carrier signal through a D/A converter (36). The two resultant signals are outputted as analog signals, and are added to each other through an adder (37), thereby to output a frequency-modulated signal. Because of the digital processing, the frequency modulator can have exellent linear characteristics, little harmonic distortion, and high reliability.

4. 发明公开

EP0417328A1 CLOCK GENERATOR 失效
标题翻译： TAKTSIGNALGENERATOR。
公开(公告)号：EP0417328A1
公开(公告)日：1991-03-20
申请号：EP90905658.2
申请日：1990-03-28
申请人： SHARP KABUSHIKI KAISHA
发明人： HIRAMATSU, Yonejirou , SATOU, Shun-ichi
IPC分类号： H04N5/95 , G11B20/02
CPC分类号： G11B20/02 , H04N5/935 , H04N5/956 , H04N9/896
摘要： The clock generator includes a quartz oscillator (1) which generates clock signals that pass through a band-pass filter (2) which form sinusoidal reference clock signals. The clock signals are fed to a multiplier (3), and delayed by one-fourth period through a one-fourth period delay unit (4) to form clock signals cos 2πf ct which are then applied to a multiplier (5). When a horizontal synchronizing signal is introduced from an external unit, an A/D converter (6) samples the reference clock signal with the horizontal synchronizing signal and sends a digital signal to an operation unit (7) which operates a phase difference between an absolute phase of the digital signal and a predetermined phase, and produces a sinusoidal wave components in (a-b) and a cosine wave component cos (a-b) that correspond to the phase difference. The multiplier multiplies the reference clock signal sin 2πf ct by the sinusoidal wave component sin (a-b), and the multiplier (S) multiplies the cosine clock signal cos 2πf ct by the cosine wave component cos (a-b). These multiplied results are added up together through an adder (9), and the sum is converted into a binary value through a comparator (12) which then produces an output clock pulse W.CK.
摘要翻译：时钟发生器包括一个石英振荡器（1），它产生通过形成正弦参考时钟信号的带通滤波器（2）的时钟信号。时钟信号被馈送到乘法器（3），并通过四分之一周期延迟单元（4）延迟四分之一周期，以形成时钟信号cos 2 pi fct，然后施加到乘法器（5）。当从外部单元引入水平同步信号时，A / D转换器（6）用水平同步信号对参考时钟信号进行采样，并将数字信号发送到操作单元（7），操作单元（7）操作绝对值数字信号的相位和预定相位，并且产生对应于相位差的正弦波分量sin（ab）和余弦波分量cos（ab）。乘法器将参考时钟信号sin 2 pi fct乘以正弦波分量sin（a-b），乘法器（5）将余弦时钟信号cos 2 pi fct乘以余弦波分量cos（a-b）。这些相乘结果通过加法器（9）相加在一起，并且通过比较器（12）将和转换成二进制值，该比较器产生输出时钟脉冲W.CK。

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