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热词
    • 3. 发明公开
    • Phase-locked circuit
    • 锁相电路
    • EP0711041A1
    • 1996-05-08
    • EP94830523.0
    • 1994-11-03
    • SGS-THOMSON MICROELECTRONICS S.r.l.
    • Gadducci, PaoloDemicheli, MarcoPisati, ValerioAlini, Roberto
    • H03L7/14H03L7/089
    • H03L7/089H03L7/148
    • A phase-locked circuit for regulating the frequency of a controllable oscillator (ICO2) at a preset value is described. It comprises a reference oscillator (ICO1) which generates a signal at the preset frequency, a phase detector (10) which receives the signals from the two oscillators and produces a phase error signal, and processing circuit means which can apply a signal which is a function of the magnitude and sign of the phase error at the regulating terminal of the controllable oscillator (ICO2).
      In order to enable the feedback loop to open for an indefinite period after a phase-locking while still maintain the frequency at the preset value, the processing circuit means comprise a counter (CNT) which numerically measures the phase error and a digital-to-analogue convertor (DAC) which produces an input signal corresponding to the numerical measurement.
    • 描述了用于将可控振荡器(ICO2)的频率调节到预设值的锁相电路。 它包括产生预置频率信号的基准振荡器(ICO1),接收来自两个振荡器的信号并产生相位误差信号的相位检测器(10),以及处理电路装置,其能够将作为 在可控振荡器(ICO2)的调节端处的相位误差的幅度和符号的函数。 为了使得反馈回路在锁相之后无限期地打开,同时仍将频率保持在预设值,处理电路装置包括计数器(CNT),该计数器在数值上测量相位误差,并且数字 - 模拟转换器(DAC),它产生对应于数字测量的输入信号。