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    • 1. 发明申请
    • MULTIPLIER DEVICE
    • 多媒体设备
    • WO2005055414A1
    • 2005-06-16
    • PCT/EP2004/013742
    • 2004-12-01
    • SEMICONDUCTORS IDEAS TO THE MARKET (ITOM) B.V.KASPERKOVITZ, Wolfdietrich, Georg
    • KASPERKOVITZ, Wolfdietrich, Georg
    • H03D1/22
    • H03D1/2209
    • Multiplier device comprising first to n th multipliers M 1 to M n for multiplying a carrier modulated information signal with first to n th mutually phase shifted and identical, substantially square wave mixing signals MS 1 to MS n with 50% duty cycle. In order to eliminate fifth or higher order interferences from the output of said multiplier device according to the invention, n is greater than 2, outputs of said multipliers M 1 to M n are respectively coupled through weighting circuits W 1 to W n with respective fixed weighting factors WF 1 to WF n to an adder circuit, said mixing signals MS 1 to MS n having respective phase angles φ i corresponding to φ i = i * Δφ, said weighting factors WF i corresponding to the sine value of said respective phase angles φ i = i * Δφ with Δφ being the mutual phase difference between each two phase consecutive mixing signals corresponding to π/(n + 1) and i varying from 1 to n.
    • 乘法器装置包括第一至第n乘法器M1至Mn,用于将载波调制信息信号与第一至第n相互相移且相等的具有50%占空比的基本方波混频信号MS1至MSn相乘。 为了从根据本发明的所述乘法器装置的输出消除第五或更高阶干扰,n大于2,所述乘法器M1至Mn的输出分别通过加权电路W1至Wn耦合,各个固定加权系数WF1至 WFn到加法器电路,所述混合信号MS1至MSn具有对应于phi i = i * Deltaphi的各个相位角phii,所述加权因子WFi对应于所述各个相位角phi i = i * Deltaphi的正弦值,其中Deltaphi为 每个两相连续混合信号之间的相位差对应于pi /(n + 1),i从1变化到n。
    • 7. 发明申请
    • FM RECEIVER
    • FM接收器
    • WO2008101674A1
    • 2008-08-28
    • PCT/EP2008/001297
    • 2008-02-20
    • SEMICONDUCTOR IDEAS TO THE MARKET (ITOM)KASPERKOVITZ, Wolfdietrich, Georg
    • KASPERKOVITZ, Wolfdietrich, Georg
    • H04B1/16H03D3/00
    • H04B1/16H03D3/002
    • FM receiver including an RF input circuit followed by a tunable mixer stage for frequency conversion of an RF FM signal into an IF FM signal, which is coupled to an FM input of a first narrow-band IF filter. The center frequency of the first narrow-band IF filter is controlled to vary in dependence on the IF FM signal. The first narrow-band IF filter is subsequently coupled to a first FM demodulator and a first LF signal processing unit. To increase the receiver's selectivity and sensitivity without adversely affecting tracking stability, the FM input of a first narrow-band IF filter is coupled through a second FM demodulator to a control input of said first narrow-band FM tracking filter for a feed forward tracking control of the center frequency of said first narrow-band FM tracking filter with the momentary frequency of the IF FM signal.
    • FM接收机包括RF输入电路,其后面是用于将RF FM信号频率转换成IF FM信号的可调谐混频器级,其被耦合到第一窄带IF滤波器的FM输入。 控制第一窄带IF滤波器的中心频率以根据IF FM信号而变化。 第一窄带IF滤波器随后耦合到第一FM解调器和第一LF信号处理单元。 为了增加接收机的选择性和灵敏度而不影响跟踪稳定性,第一窄带IF滤波器的FM输入通过第二FM解调器耦合到所述第一窄带FM跟踪滤波器的控制输入端,用于前馈跟踪控制 的所述第一窄带FM跟踪滤波器的中心频率与IF FM信号的瞬时频率。
    • 8. 发明申请
    • PROGRAMMABLE HIGH PRECISION QUADRATURE SPLITTER
    • 可编程高精度分频器
    • WO2005025063A1
    • 2005-03-17
    • PCT/EP2004/009872
    • 2004-09-05
    • SEMICONDUCTOR IDEAS TO THE MARKET (ITOM) BVKASPERKOVITZ, Wolfdietrich, Georg
    • KASPERKOVITZ, Wolfdietrich, Georg
    • H03H11/04
    • H03H11/0472H03H11/22H03H2011/0494H03H2210/021H03H2210/046
    • Programmable high precision quadrature splitter comprising a fully programmable high precision filter having a filter input and a filter output including a first, first order low pass filter section comprising first and second mutually identical operational transconductance amplifiers (OTAs), each having a controllable transconductance Gm from a differential voltage input to a single current output, the current outputs of both first and second OTAs being resistorless coupled to a first capacitor, the current output of the second OTA being negatively fed back to its first differential voltage input terminal to form a variable positive virtual resistance across said first capacitor, said filter input being coupled in common to said first, first order low pass filter section and a first quadrature, first order low pass filter section, which is identical to said first, first order low pass filter section and comprises a first quadrature capacitor, identical to the first capacitor, output terminals of the first and first quadrature, first order low pass filter sections being coupled to first and second voltage input terminals of first and second tuning control OTAs respectively, said first and second tuning control OTAs being identical to each of the OTAs of the first and first quadrature, first order low pass filter sections and being negatively fed back through its current outputs to the first voltage input terminals of the second OTAs of the first quadrature and first, first order low pass filter sections, respectively, the second and first voltage input terminals of said first and second tuning control OTAs being coupled to a third DC voltage reference level, the first OTAs of the first and first quadrature, first order low pass filter sections being supplied with said gain control signal, the second OTAs of the first and first quadrature, first order low pass filter sections being supplied with a bandwidth control signal, and said first and second tuning control OTAs being supplied with a tuning control signal.
    • 可编程高精度正交分波器包括具有滤波器输入和滤波器输出的完全可编程的高精度滤波器,滤波器输出包括第一,第一级低通滤波器部分,其包括第一和第二相互相同的运算跨导放大器(OTAs),每个具有可控的跨导Gm, 输入到单个电流输出的差分电压,第一和第二OTAs的电流输出无阻抗地耦合到第一电容器,第二OTA的电流输出被负反馈到其第一差分电压输入端,以形成可变的正 所述第一电容器上的虚拟电阻,所述滤波器输入共同耦合到所述第一一阶低通滤波器部分和与所述第一低通滤波器部分相同的第一正交一阶低通滤波器部分,以及 包括与第一电容器相同的第一正交电容器,输出t 第一和第一正交一阶低通滤波器部分的初始端分别耦合到第一和第二调谐控制OTA的第一和第二电压输入端,所述第一和第二调谐控制OTA与第一和第二调谐控制OTA中的每一个相同, 第一正交一阶低通滤波器部分,并且通过其电流输出向第一正交和第一一阶低通滤波器部分的第二OTA的第一电压输入端反向反馈第二和第一电压输入 所述第一和第二调谐控制OTA的端子耦合到第三直流电压参考电平,所述第一和第一正交一阶低通滤波器部分的第一OTA被提供有所述增益控制信号,所述第一和第二正交 第一正交一阶低通滤波器部分被提供带宽控制信号,以及所述第一和第二调谐控制OTA s被提供调谐控制信号。
    • 9. 发明申请
    • RECEIVER
    • WO2003023950A3
    • 2003-03-20
    • PCT/EP2002/009807
    • 2002-09-01
    • SEMICONDUCTOR IDEAS TO THE MARKET (ITOM) B.V.KASPERKOVITZ, Wolfdietrich, Georg
    • KASPERKOVITZ, Wolfdietrich, Georg
    • H03D5/00
    • Receiver comprising an RF front end circuit for a selection and conversion of an RF input signal into a pair of quadrature IF (intermediate frequency) signals being supplied through in-phase and phase quadrature signal paths to signal inputs of quadrature phase detection means included in a (PLL) phase locked loop, an output of said quadrature phase detection means being coupled through a loop filter to a control input of a quadrature IF oscillator supplying a pair of quadrature IF oscillator signals to carrier inputs of said quadrature phase detection means. To suppress amplitude and phase mismatch deteriorating proper mirror cancellation said quadrature phase detection means is coupled to amplitude and phase error detection means for a detection of amplitude and phase errors in the output signal of said quadrature phase detection means and a quadrature frequency doubler is coupled between the quadrature local oscillator and carrier inputs of said amplitude and phase error detection means to supply respectively thereto in-phase and phase quadrature error detection carrier signals at twice the IF carrier frequency of said pair of quadrature IF signals, said amplitude and phase error detection means respectively providing amplitude and phase error signals through first and second low-pass filters to an amplitude correction circuit and a phase correction circuit preceding at least one of the inputs of said quadrature phase detection means for a negative feedback of said amplitude and phase errors.
    • 10. 发明申请
    • RECEIVER WITH AGC CONTROLLED RESONANCE AMPLIFIER
    • 采用AGC控制谐振放大器
    • WO2002071604A2
    • 2002-09-12
    • PCT/EP2002/000528
    • 2002-01-18
    • SEMICONDUCTOR IDEAS TO THE MARKET (ITOM) B.V.KASPERKOVITZ, Wolfdietrich, Georg
    • KASPERKOVITZ, Wolfdietrich, Georg
    • H03G3/30
    • H03J3/08H03G3/3052
    • Receiver comprising a resonance amplifier for selectively amplifying a modulated carrier signal being coupled to signal demodulation means for narrow band demodulation. Said resonance amplifier comprising a cascade of first and second transconductance amplifiers (TC1, TC2) being included in a loop, outputs thereof being coupled via first and second parallel RC filters (R1C1; R2C2) to inputs of the second and first transconductance amplifiers (TC1, TC2), respectively, said loop also includes means for signal inversion (INV). Inputs and outputs of third and fourth transconductance amplifiers (TC3, TC4) are coupled to outputs of said first and second transconductance amplifiers (TC1, TC2), respectively, to effectuate a negative resistance value across said first and second parallel RC filters (R1C1, R2C2), respectively, varying with the gain of said third and fourth transconductance amplifiers (TC3, TC4), fifth and sixth transconductance amplifiers (TC5, TC6) are coupled between inputs and outputs of said resonance amplifier. In order to reduce the overall noise figure of the receiver, said AGC signal generating means derive first and second control signals (Iq, Id) from said first DC signal (A), said control signals (Iq, Id) being supplied to gain control inputs of said third to sixth transconductance amplifiers (TC3, TC4, TC5, TC6).
    • 接收机包括用于选择性地放大被调制的载波信号的谐振放大器,耦合到用于窄带解调的信号解调装置。 所述谐振放大器包括级联的第一和第二跨导放大器(TC1,TC2),其包括在一个环路中,其输出端经由第一和第二并联RC滤波器(R1C1; R2C2)耦合到第二和第一跨导放大器(TC1 ,TC2),所述环路还包括用于信号反转(INV)的装置。 第三和第四跨导放大器(TC3,TC4)的输入和输出分别耦合到所述第一和第二跨导放大器(TC1,TC2)的输出,以实现所述第一和第二并联RC滤波器(R1C1, R2C2)分别与所述第三和第四跨导放大器(TC3,TC4)的增益,第五和第六跨导放大器(TC5,TC6)的耦合在所述谐振放大器的输入和输出之间。 为了降低接收机的总体噪声系数,所述AGC信号产生装置从所述第一直流信号(A)导出第一和第二控制信号(Iq,Id),所述控制信号(Iq,Id)被提供给增益控制 所述第三至第六跨导放大器(TC3,TC4,TC5,TC6)的输入。