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1. 发明申请

WO2012086975A3 DIRECT CURRENT/ DIRECT CURRENT CONVERTER FOR REDUCING SWITCHING LOSS, WIRELESS POWER RECEIVER INCLUDING DIRECT CURRENT/ DIRECT CURRENT CONVERTER 审中-公开
标题翻译：用于减少开关损耗的直流/直流转换器，包括直流/直流转换器的无线电源接收器
公开(公告)号：WO2012086975A3
公开(公告)日：2012-08-23
申请号：PCT/KR2011009767
申请日：2011-12-19
申请人： SAMSUNG ELECTRONICS CO LTD , IUCF HYU
发明人： KIM DONG ZO , HONG YOUNG TACK , MOON YOUNG JIN , KWON SANG WOOK , PARK YUN KWON , YOO CHANG SIK , PARK EUN SEOK , KIM KI YOUNG , RYU YOUNG HO , KIM NAM YUN , CHOI JIN SUNG , ROH YONG SEONG
IPC分类号： H02J17/00 , G05F1/10 , H02M3/155
CPC分类号： H02J50/12 , H02J5/005 , H02M3/1588 , Y02B70/1466
摘要： Provided are a direct current/direct current (DC/DC) converter and a wireless power receiver including the DC/DC converter. In one embodiment, a direct current-direct current (DC/DC) converter for use in a wireless power receiver, the DC/DC converter may include: a voltage converting unit configured to convert, DC voltage, to a predetermined DC voltage; a turn-on switch configured to control current flow of the DC voltage through the voltage converting unit; and a switching controller configured to: detect an amount of current of the voltage converting unit based on a first turn-on period of the turn-on switch, set a second turn-on period of the turn-on switch based on the detected amount of current, and control the turn-on switch based on the second turn-on period.
摘要翻译：提供了包括该DC / DC转换器的直流/直流（DC / DC）转换器和无线电力接收器。在一个实施例中，一种用于无线电力接收器的直流 - 直流（DC / DC）转换器，所述DC / DC转换器可以包括：电压转换单元，被配置为将DC电压转换为预定DC电压; 接通开关，被配置为控制通过电压转换单元的DC电压的电流流动; 以及切换控制器，其被配置为：基于所述导通开关的第一导通时段检测所述电压转换单元的电流量，基于检测到的量设置所述导通开关的第二导通时段的电流，并基于第二导通周期控制导通开关。

2. 发明申请

WO2012026784A2 ACTIVE RECTIFIER WITH DELAY LOCKED LOOP, WIRELESS POWER RECEIVING APPARATUS INCLUDING ACTIVE RECTIFIER 审中-公开
标题翻译：具有延迟锁定环的主动整流器，包括有源整流器的无线电源接收装置
公开(公告)号：WO2012026784A2
公开(公告)日：2012-03-01
申请号：PCT/KR2011006321
申请日：2011-08-26
申请人： SAMSUNG ELECTRONICS CO LTD , IUCF HYU
发明人： KIM DONG ZO , HONG YOUNG TACK , CHOI JIN SUNG , MOON YOUNG JIN , KWON SANG WOOK , PARK YUN KWON , YOO CHANG SIK , PARK EUN SEOK , KIM KI YOUNG , RYU YOUNG HO , KIM NAM YUN , ROH YONG SEONG
IPC分类号： H02J17/00 , H02M7/04
CPC分类号： H02M1/083 , H02M7/217
摘要： An active rectifier and a wireless power receiver including the active rectifier are provided. According to an aspect, an active rectifier may include: a first loop configured to provide voltage when the phase of an input signal is positive; and a second loop configured to provide voltage when the phase of the input signal is negative, wherein the first loop and the second loop include a delay locked loop configured to compensate for reverse current leakage due to a delay of a switch included therein.
摘要翻译：提供了包括有源整流器的有源整流器和无线电力接收器。根据一方面，有源整流器可以包括：第一回路，其被配置为当输入信号的相位为正时提供电压; 以及第二回路，其被配置为当所述输入信号的相位为负时提供电压，其中所述第一回路和所述第二回路包括延迟锁定回路，其被配置为补偿由于其中包括的开关的延迟引起的反向电流泄漏。

3. 发明公开

EP2656478A4 DIRECT CURRENT/ DIRECT CURRENT CONVERTER FOR REDUCING SWITCHING LOSS, WIRELESS POWER RECEIVER INCLUDING DIRECT CURRENT/ DIRECT CURRENT CONVERTER 审中-公开
标题翻译： DC-DC转换器用于降低功耗的无线接收器，开关损耗与DC-DC转换器
公开(公告)号：EP2656478A4
公开(公告)日：2014-08-20
申请号：EP11850511
申请日：2011-12-19
申请人： SAMSUNG ELECTRONICS CO LTD , IUCF HYU
发明人： KIM DONG ZO , HONG YOUNG TACK , MOON YOUNG JIN , KWON SANG WOOK , PARK YUN KWON , YOO CHANG SIK , PARK EUN SEOK , KIM KI YOUNG , RYU YOUNG HO , KIM NAM YUN , CHOI JIN SUNG , ROH YONG SEONG
IPC分类号： H02M3/158 , H02J17/00
CPC分类号： H02J50/12 , H02J5/005 , H02M3/1588 , Y02B70/1466
摘要： Provided are a direct current/direct current (DC/DC) converter and a wireless power receiver including the DC/DC converter. In one embodiment, a direct current-direct current (DC/DC) converter for use in a wireless power receiver, the DC/DC converter may include: a voltage converting unit configured to convert, DC voltage, to a predetermined DC voltage; a turn-on switch configured to control current flow of the DC voltage through the voltage converting unit; and a switching controller configured to: detect an amount of current of the voltage converting unit based on a first turn-on period of the turn-on switch, set a second turn-on period of the turn-on switch based on the detected amount of current, and control the turn-on switch based on the second turn-on period.

4. 发明公开

KR20070042135A QUADRATURE VOLTAGE CONTOLLED OSCILLATOR 无效
标题翻译：正弦电压连接振荡器
公开(公告)号：KR20070042135A
公开(公告)日：2007-04-20
申请号：KR20070032520
申请日：2007-04-02
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： JEONG CHAN YOUNG , YOO CHANG SIK , LEE SEONG SOO , LEE HEUNG BAE , PARK JIN SOO
IPC分类号： H03B5/12
CPC分类号： H03B27/00 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1271
摘要： 낮은 위상 잡음과 양호한 출력 스윙을 가지는 쿼드러쳐 전압 제어 발진기가 개시된다. 본 쿼드러쳐 전압 제어 발진기는 포지티브 동위상 출력신호와 네거티브 동위상 출력신호를 출력하는 제1전압 제어 발진기와, 제1전압 제어 발진기와 대칭적인 구조를 가지며 제1전압 제어 발진기와 함께 피드백 루프를 형성하는, 포지티브 직각 위상 출력 신호와 네거티브 직각 위상 출력신호를 출력하는 제2전압 제어 발진기와, 출력신호들에 대응하여 제1전압 제어 발진기에 일정한 전류를 공급하는 제1 정전류원과, 출력신호들에 대응하여 제2전압 제어 발진기에 일정한 전류를 공급하는 제2정전류원을 포함한다.
VCO, 발진기, 위상, 잡음, 쿼드러쳐

5. 发明专利

FR2788902A1 未知
公开(公告)号：FR2788902A1
公开(公告)日：2000-07-28
申请号：FR0000988
申请日：2000-01-26
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： YOO CHANG SIK , LEE SANG BO
IPC分类号： G06F1/10 , H03L7/06 , G11C11/407 , H03L7/081 , H03L7/10 , H03K5/14
摘要： A delay locked loop generates an advanced clock signal synchronized with a reference clock signal. The delay locked loop includes an input buffer, a variable delay circuit, a delay compensation circuit, a phase shifter, a delay controller, a phase sensing pump and a phase inversion controller. The variable delay circuit includes a multiplicity of delay terminals. The number of enabled delay terminals is controlled by a counting signal group. In the phase shifter, the phase of an output signal of the variable delay circuit generates the advanced clock signal with a phase of the reference clock signal. When the compared phase difference is more than Pi, the phase shifter inverts a delayed clock signal to generate the advanced clock signal. When the compared phase difference is less than Pi, the delayed clock signal is non-inverted to be generated as the advanced clock signal.

6. 发明专利

FR2788902B1 未知
公开(公告)号：FR2788902B1
公开(公告)日：2005-02-18
申请号：FR0000988
申请日：2000-01-26
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： YOO CHANG SIK , LEE SANG BO
IPC分类号： G06F1/10 , H03L7/06 , G11C11/407 , H03L7/081 , H03L7/10 , H03K5/14
摘要： A delay locked loop generates an advanced clock signal synchronized with a reference clock signal. The delay locked loop includes an input buffer, a variable delay circuit, a delay compensation circuit, a phase shifter, a delay controller, a phase sensing pump and a phase inversion controller. The variable delay circuit includes a multiplicity of delay terminals. The number of enabled delay terminals is controlled by a counting signal group. In the phase shifter, the phase of an output signal of the variable delay circuit generates the advanced clock signal with a phase of the reference clock signal. When the compared phase difference is more than Pi, the phase shifter inverts a delayed clock signal to generate the advanced clock signal. When the compared phase difference is less than Pi, the delayed clock signal is non-inverted to be generated as the advanced clock signal.

7. 发明授权

KR101116355B1 Successive approximation regsister circuit and successive approximation analog digital convertor including the same 有权
标题翻译：具有相似性的近似寄生电路及其相似的近似数字数字转换器
公开(公告)号：KR101116355B1
公开(公告)日：2012-03-09
申请号：KR20100113191
申请日：2010-11-15
申请人： IUCF HYU , HYNIX SEMICONDUCTOR INC
发明人： JEONG CHUN SEOK , KIM KYUNG WHAN , YOO CHANG SIK , LEE JANG WOO
IPC分类号： H03M1/12
CPC分类号： H03M1/38 , H03M1/1009 , H03M2201/225 , H03M2201/62
摘要： PURPOSE: A successive approximation register circuit and a successive approximation analog digital convertor including the same are provided to improve performance by reducing time which is taken to convert an analog signal into a digital signal. CONSTITUTION: A selecting unit(610) selects for a setting value of a first half period having the several times of scan periods. The selecting unit selects a reference value which is inputted at the scan period in a latter half period one by one. A register unit(620) includes a plurality of registers. A controlling unit(630) successively activates a register of the register unit at each scan period. The register activated among a plurality of registers(621,622,626) stores an output value of the selecting unit.
摘要翻译：目的：提供逐次逼近寄存器电路和包括其的逐次逼近模拟数字转换器，以通过减少将模拟信号转换为数字信号所需的时间来提高性能。构成：选择单元（610）选择具有多次扫描周期的前半个周期的设定值。选择单元逐个选择在后半个时段的扫描周期输入的基准值。寄存器单元（620）包括多个寄存器。控制单元（630）在每个扫描周期连续激活寄存器单元的寄存器。在多个寄存器（621,622,626）中激活的寄存器存储选择单元的输出值。

8. 发明授权

KR100679125B1 FREQUENCY MIXER HAVING DIRECT CONVERSION METHOD 无效
标题翻译：具有直接转换方法的频率混合器
公开(公告)号：KR100679125B1
公开(公告)日：2007-01-30
申请号：KR20060023343
申请日：2006-03-14
申请人： IUCF HYU
发明人： YOO CHANG SIK , JUNG JAE HOON
IPC分类号： H03D7/00
摘要： A frequency mixer having a direct conversion scheme is provided to suppress a generation of a harmonic component based on a signal offset caused by a phase difference and to improve a signal path separation by forming a double balance structure. A frequency mixer having a direct conversion scheme includes a first switching terminal(610), a second switching terminal(620), at least one first load resistor(650), at least one second load resistor(660), a first bias terminal(630), and a second bias terminal(640). The first switching terminal(610) receives a high frequency signal and a local oscillation signal. The second switching terminal(620) receives an AC ground signal and the local oscillation signal. The first load resistor(650) is connected to the first switching terminal(610) and the second switching terminal(620), and outputs a first output signal. The second load resistor(660) is connected to the first switching terminal(610) and the second switching terminal(620), and outputs a second output signal. The first bias terminal(630) outputs a first bias voltage which adjusts a duty cycle of the first switching terminal(610) based on mismatching between the first load resistor(650) and the second load resistor(660). The second bias terminal(640) outputs a second bias voltage which adjusts a duty cycle of the second switching terminal(620) based on the mismatching between the first load resistor(650) and the second load resistor(660). A baseband signal corresponds to a difference between the first output signal and the second output signal.
摘要翻译：提供具有直接转换方案的混频器，以基于由相位差引起的信号偏移来抑制产生谐波分量，并通过形成双重平衡结构来改善信号路径分离。具有直接转换方案的混频器包括第一开关端子（610），第二开关端子（620），至少一个第一负载电阻器（650），至少一个第二负载电阻器（660），第一偏置端子 630）和第二偏置端子（640）。第一开关端子（610）接收高频信号和本地振荡信号。第二开关端子（620）接收AC接地信号和本地振荡信号。第一负载电阻（650）连接到第一开关端子（610）和第二开关端子（620），并输出第一输出信号。第二负载电阻器（660）连接到第一开关端子（610）和第二开关端子（620），并输出第二输出信号。第一偏置端子（630）输出基于第一负载电阻器（650）和第二负载电阻器（660）之间的不匹配来调整第一开关端子（610）的占空比的第一偏置电压。第二偏置端子（640）输出基于第一负载电阻器（650）和第二负载电阻器（660）之间的不匹配来调整第二开关端子（620）的占空比的第二偏置电压。基带信号对应于第一输出信号和第二输出信号之间的差。

9. 发明授权

KR101212364B1 System for interworking and controlling devices and user device used in the same 有权
标题翻译：用于在其中使用的设备和用户设备的接入和控制系统
公开(公告)号：KR101212364B1
公开(公告)日：2012-12-13
申请号：KR20120022988
申请日：2012-03-06
申请人： IUCF HYU
发明人： YOO CHANG SIK
IPC分类号： G06F15/16 , G06F3/041 , H04B1/40
CPC分类号： G06F3/1423 , G06F3/0412 , G06F3/0416 , G06F15/16 , H04B1/38 , H04B1/401
摘要： PURPOSE: Terminal connection, a control system and a user terminal using the same are provided to display a second image related to a control operation of a user for a small size terminal on a first image of a big size terminal in a state that the first image is shared in terminals, thereby controlling an operation of the small size terminal with the big size terminal. CONSTITUTION: A size of an image unit(2310) is bigger than a user terminal and outputs image data. The first image corresponds to a first image shared in a receiving terminal watched by a user. A signal unit(2306) transmits image data outputted from the image unit and location information of a touch means touching the user terminal to the receiving terminal. The location information is information of the touch means touching the user terminal under a predetermined pressure level or a predetermined touch area. The location information is displayed in the receiving terminal as an image type. [Reference numerals] (2300) Control unit; (2302) Connection unit; (2304) Transmitting/receiving unit; (2306) Signal unit; (2308) Receiver unit; (2310) Image unit; (2312) Display unit; (2314) Storage unit
摘要翻译：目的：提供终端连接，控制系统和使用该终端连接的用户终端，以在大尺寸终端的第一图像上显示与小尺寸终端的用户的控制操作相关的第二图像，该第一图像处于第一图像在终端中共享，从而控制具有大尺寸终端的小尺寸终端的操作。构成：图像单元（2310）的尺寸大于用户终端，并输出图像数据。第一图像对应于在用户观看的接收终端中共享的第一图像。信号单元（2306）将从图像单元输出的图像数据和触摸用户终端的触摸装置的位置信息发送到接收终端。位置信息是在预定压力水平或预定触摸区域下接触用户终端的触摸装置的信息。位置信息作为图像类型显示在接收终端中。（2300）控制单元; （2302）连接单元; （2304）发射/接收单元; （2306）信号单元; （2308）接收单元; （2310）图像单元; （2312）显示单元; （2314）存储单元

10. 发明公开

KR20120076400A Voltage mode driver, comparating circuit using the voltage mode driver and operating method thereof 有权
标题翻译：电压模式驱动器，使用电压模式驱动器的比较电路及其工作方法
公开(公告)号：KR20120076400A
公开(公告)日：2012-07-09
申请号：KR20100137643
申请日：2010-12-29
申请人： IUCF HYU
发明人： YOO CHANG SIK , BAE CHANG HYUN , KIM OOK
IPC分类号： H03K19/0175 , H04L25/02
CPC分类号： H03K19/018521 , H03K19/09432 , H04L25/0272 , H04L25/0278
摘要： PURPOSE: A voltage mode driver and comparator circuits and operation method therefor are provided to constitute the comparator circuit for controlling impedance without separate reference resistance by using termination resistance in a reception terminal. CONSTITUTION: A voltage mode driver(200) includes a plurality of unit circuits(210,220,250). The unit circuits are parallely arranged in the voltage mode driver. The unit circuits include a plurality of resistances and a plurality of switch transistors controlling a voltage size. The voltage mode driver controls the voltage size in a de-emphasis circuit by using legs included in the plurality of unit circuits. The plurality of unit circuits has a binary weight. The legs included in the plurality of unit circuits can have different weighted values including each binary weight.
摘要翻译：目的：提供一种电压模式驱动器及其比较器电路及其操作方法，以通过在接收端子中使用终端电阻来构成用于控制阻抗而不具有单独参考电阻的比较器电路。构成：电压模式驱动器（200）包括多个单元电路（210,220,250）。单元电路并联布置在电压模式驱动器中。单元电路包括多个电阻和控制电压大小的多个开关晶体管。电压模式驱动器通过使用包括在多个单元电路中的支路来控制去加重电路中的电压大小。多个单元电路具有二进制权重。包括在多个单元电路中的腿可以具有不同的加权值，包括每个二进制权重。

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