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1. 发明公开

KR20180041289A 유전체 층을 포함하는 반도체 소자 审中-公开
公开(公告)号：KR20180041289A
公开(公告)日：2018-04-24
申请号：KR20160132750
申请日：2016-10-13
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： CHOI JI HOON , KIM SUNG GIL , KIM SEUL YE , KIM JUNG HO , KIM HONG SUK , NAM PHIL OUK , AHN JAE YOUNG
IPC分类号： H01L29/66 , H01L21/8239 , H01L27/115 , H01L29/423
CPC分类号： H01L27/11582 , H01L23/5283 , H01L27/11565
摘要： 유전체층을포함하는반도체소자를제공한다. 이반도체소자는기판상의적층구조체를포함한다. 상기적층구조체는교대로적층되는층간절연층들및 제1 게이트전극들을포함한다. 상기층간절연층들및 제1 게이트전극들을관통하는개구부내에반도체층이배치된다. 상기반도체층과상기적층구조체사이에제1 유전체층이배치된다. 상기제1 게이트전극들보다상기기판에가까운하부패턴이배치된다. 상기하부패턴은상기제1 유전체층과마주보는제1 면및 상기제1 면과예각을형성하며상기적층구조체와마주보는제2 면을갖는다. 상기제1 유전체층은상기적층구조체와마주보는제1 부분및 상기하부패턴의상기제1 면과마주보며상기제1 부분보다두꺼운제2 부분을포함한다.

2. 发明公开

KR20180021948A 반도체 장치 审中-公开
标题翻译：半导体器件
公开(公告)号：KR20180021948A
公开(公告)日：2018-03-06
申请号：KR20160106014
申请日：2016-08-22
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： NAM PHIL OUK , KIM HYUNG JOON , KIM SUNG GIL , CHOI JI HOON , KIM SEUL YE , KIM HONG SUK , AHN JAE YOUNG
IPC分类号： H01L27/115
CPC分类号： H01L27/11556 , H01L27/11582 , H01L29/0653 , H01L29/402 , H01L29/408
摘要： 본발명의일 실시예는, 기판상에교대로적층되는게이트전극들및 층간절연층들과, 상기게이트전극들및 상기층간절연층들을관통하는채널층과, 상기게이트전극들과상기채널층사이에배치되는게이트유전층과, 상기채널층의내부의적어도일부를충진하는충진절연층과, 상기채널층과상기충진절연층사이에배치되며고유전율물질또는금속을포함하는전하고정층(charge fixing layer)과, 상기전하고정층으로부터물리적으로분리되도록상기충진절연층상에배치되며상기채널층과연결되는도전패드를포함하는반도체장치를제공할수 있다.
摘要翻译：半导体器件可以包括交替地堆叠在衬底上的栅电极和层间绝缘层，穿透栅电极和层间绝缘层的沟道层，栅电极和沟道层之间的栅电介质层，填充绝缘体，填充绝缘体至少填充沟道层的内部的一部分，沟道层和填充绝缘体之间的电荷固定层，并且包括高k材料和/或金属，以及导电焊盘，连接到沟道层和填充绝缘体上。导电垫可以与电荷固定层物理分离。

3. 发明公开

KR20070079115A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：KR20070079115A
公开(公告)日：2007-08-06
申请号：KR20060009536
申请日：2006-02-01
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： NOH JIN TAE , YANG SANG RYOL , HWANG KI HYUN , KIM JIN GYUN , LEE SUNG HAE , KIM HONG SUK
IPC分类号： H01L21/336
摘要： A method for manufacturing a semiconductor device is provided to control effectively off-current of a cell transistor by increasing a work function of a gate electrode. A gate insulating layer(102) and a polysilicon layer doped with a P type impurity are formed on a substrate(100) including a cell area having a pin type active area and a peri/core area including a flat type active area. A photoresist pattern for exposing an NMOS transistor region of the peri/core area is formed on the polysilicon layer doped with the P type impurity. The exposed polysilicon layer is converted to an N type impurity-doped polysilicon layer by counter-doping an N type impurity on the polysilicon layer. A first polysilicon pattern(110) doped with the P type impurity, a second polysilicon pattern(112) doped with the P type impurity, and a third polysilicon pattern(114) doped with the N type impurity are formed by patterning the polysilicon layer doped with the P type impurity and the N type impurity. Source/drains are formed at both sides of the first to the third polysilicon patterns.
摘要翻译：提供一种用于制造半导体器件的方法，通过增加栅电极的功函数来有效地控制单元晶体管的截止电流。在包括具有引脚型有源区域的单元区域和包括平面型有源区域的区域/核心区域的基板（100）上形成栅极绝缘层（102）和掺杂有P型杂质的多晶硅层。在掺杂有P型杂质的多晶硅层上形成用于暴露周边/核心区域的NMOS晶体管区域的光致抗蚀剂图案。曝光的多晶硅层通过在多晶硅层上相互掺杂N型杂质而转换成N型杂质掺杂多晶硅层。掺杂有P型杂质的第一多晶硅图案（110），掺杂有P型杂质的第二多晶硅图案（112）和掺杂有N型杂质的第三多晶硅图案（114）通过将多晶硅层掺杂具有P型杂质和N型杂质。源极/漏极形成在第一至第三多晶硅图案的两侧。

4. 发明公开

KR20180055295A 글래스 기판 기반의 전기 소자 제조 방법 审中-公开
公开(公告)号：KR20180055295A
公开(公告)日：2018-05-25
申请号：KR20160152963
申请日：2016-11-16
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： KIM HONG SUK
IPC分类号： H01L21/473 , H01L21/02 , H01L21/027 , H01L21/68 , H01L23/15
CPC分类号： H05K3/4629 , H01L21/6835 , H01L21/78 , H01L21/84 , H01L27/1262 , H01L27/3244 , H01L51/0024 , H01L51/0096 , H01L2021/775 , H01L2221/68309 , H01L2221/6835 , H01L2221/68377 , H01L2227/323 , H05K1/0306 , H05K3/007 , H05K3/10 , H05K2203/176
摘要： 개시된전자소자의제조방법은, 제1원판글래스와제2원판글래스에제1, 제2분리부에의하여부분적으로연결된다수의소자셀과다수의커버셀을각각형성하도록제1, 제2원판글래스를구획하고, 다수의소자셀 각각에소자회로를패터닝한다. 그런다음, 다수의소자셀과다수의커버셀이정렬되도록제1, 제2원판글래스를적층하여다수의전기소자를형성한후에, 제1, 제2분리부를절단하여상기다수의전기소자를개별적으로분리한다.

5. 发明公开

KR20120027906A Semiconductor devices and methods of manufacturing semiconductor devices 审中-公开
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：KR20120027906A
公开(公告)日：2012-03-22
申请号：KR20100089752
申请日：2010-09-14
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： YANG JUN KYU , KIM HONG SUK , LEE JU YUL , HWANG KI HYUN , AHN JAE YOUNG
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L21/28247 , H01L21/28273 , H01L21/764 , H01L27/11568 , H01L27/11521
摘要： PURPOSE: A semiconductor device and a manufacturing method thereof are provided to protect a metal film pattern by a capping film pattern, thereby preventing whisker on the metal film pattern. CONSTITUTION: A plurality of gate structures(200) include tunnel insulation film patterns, dielectric patterns, and control gates respectively. The tunnel insulation film patterns, the dielectric patterns, and the control gates are sequentially stacked. A control gate comprises a poly silicon film pattern and a metal film pattern in which impurities are doped. A capping film pattern(182) is formed on a sidewall of a pattern of each metal film. The capping film pattern includes a metal oxide. An insulation film is formed on the substrate while the insulation film covers gate structures and the capping film pattern. The insulation film has an air gap(212).
摘要翻译：目的：提供一种半导体器件及其制造方法，以通过覆盖膜图案保护金属膜图案，从而防止金属膜图案上的晶须。构成：多个栅极结构（200）分别包括隧道绝缘膜图案，电介质图案和控制栅。隧道绝缘膜图案，电介质图案和控制栅极依次层叠。控制栅极包括掺杂杂质的多晶硅图案和金属膜图案。在每个金属膜的图案的侧壁上形成覆盖膜图案（182）。封盖膜图案包括金属氧化物。绝缘膜形成在基板上，而绝缘膜覆盖栅极结构和封盖膜图案。绝缘膜具有气隙（212）。

6. 发明专利

ES2621569T3 Intercambiador de calor 未知
公开(公告)号：ES2621569T3
公开(公告)日：2017-07-04
申请号：ES15158252
申请日：2015-03-09
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： KIM HONG SUK , KWON MYONG JONG , OH SEUNG JIN
IPC分类号： F28F19/02 , B23P15/26 , F25B39/02 , F28D1/047 , F28D21/00 , F28F1/32 , F28F17/00
摘要： Un intercambiador (100) de calor que comprende: una tubería (110) de refrigerante; y una pluralidad de aletas (120) que se acoplan a una superficie circunferencial exterior de la tubería de refrigerante, en el que cada aleta de la pluralidad de aletas comprende: una primera región (121) formada corriente abajo en una dirección en la que fluye el aire, y una segunda región (122) formada corriente arriba en la dirección en la que fluye el aire, y al menos una capa (140, 150) de revestimiento está formada en cada una de la primera región y la segunda región, caracterizado porque los espesores de la capa de revestimiento en la primera región (140) y la capa de revestimiento en la segunda región (150) son diferentes entre sí.

7. 发明专利

SG10201803196YA SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 未知
公开(公告)号：SG10201803196YA
公开(公告)日：2019-02-27
申请号：SG10201803196Y
申请日：2018-04-17
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： KIM SUNG GIL , KIM SEUL YE , KIM HONG SUK , NOH JIN TAE , CHOI JI HOON , AHN JAE YOUNG
IPC分类号： H01L27/115 , H01L21/764 , H01L27/11556 , H01L27/11582
摘要： A stack structure includes conductive layer patterns and interlayer insulating layer patterns alternately stacked on one another. A channel hole penetrates the stack structure. A dielectric layer is disposed on a sidewall of the channel hole. A channel layer is disposed on the dielectric layer and in the channel hole. A passivation layer is disposed on the channel layer and in the channel hole. The channel layer is interposed between the passivation layer and the dielectric layer. An air gap is surrounded by the passivation layer. A width of the air gap is larger than a width of the passivation layer. FIG. 2

8. 发明公开

EP3268952A4 ELECTRONIC APPARATUS AND METHOD OF CONTROLLING ELECTRONIC APPARATUS 有权
公开(公告)号：EP3268952A4
公开(公告)日：2018-04-18
申请号：EP16800254
申请日：2016-05-20
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： KIM YONG HO , KIM JOO HO , RA JIN , RYU JONG HYUN , JUNG MOON IL , SONG HYUN MIN , KIM HONG SUK , SOHN DONG HYUN
IPC分类号： G09G3/20 , G06F3/0488 , H01L27/32
CPC分类号： G06F3/041 , G06F1/1626 , G06F1/163 , G06F1/1637 , G06F1/1643 , G06F1/1647 , G06F3/013 , G06F3/0484 , G06F3/0488 , G09G3/3406 , G09G2300/023 , G09G2320/0626 , G09G2330/023 , G09G2354/00 , G09G2360/144
摘要： An electronic apparatus and a controlling method thereof are provided. The electronic apparatus includes an emissive display which provides an image with first image quality, a transparent display which is arranged on the emissive display and provides an image with second image quality, and a control unit which controls the emissive display to provide the image with the first image quality through the emissive display for an operation in a first mode, and controls the transparent display to provide the image with the second image quality through the transparent display for an operation in a second mode. The present invention provides an image by using a dual display.

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