会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明申请
    • SOFTWARE DISTRIBUTION, EXECUTION AND UPGRADING
    • 软件分发,执行和升级
    • WO0055740A8
    • 2001-03-01
    • PCT/SG9900037
    • 1999-03-18
    • KENT RIDGE DIGITAL LABSRANGARAJAN SRIDHARANLIN FENGPANG HWEE HWA
    • RANGARAJAN SRIDHARANLIN FENGPANG HWEE HWA
    • G06F9/445G06F13/00G06F15/177
    • G06F8/61
    • A method of distributing software over a communication network includes the steps of: making the software available on a file server attached to the network; providing and executing an installation application on a user's computer attached to the network; monitoring file requests made by the installation application; identifying file requests which relate to files which are not present on the user's computer; downloading the identified files from the file server; storing the downloaded files in storage media on the user's computer; and directing the file requests for the identified files, and any future file requests for those files, to the downloaded versions of those files. Similar methods are provided for executing software over a network and upgrading software over a network.
    • 通过通信网络分发软件的方法包括以下步骤:使软件在连接到网络的文件服务器上可用; 在连接到网络的用户计算机上提供和执行安装应用程序; 监视安装应用程序发出的文件请求; 识别与用户计算机上不存在的文件有关的文件请求; 从文件服务器下载已识别的文件; 将下载的文件存储在用户计算机上的存储介质中; 并将这些文件的文件请求以及对这些文件的任何将来的文件请求定向到这些文件的下载版本。 提供了用于通过网络执行软件并通过网络升级软件的类似方法。
    • 4. 发明申请
    • METHOD AND APPARATUS OF ORDERING SEARCH RESULTS
    • 订购搜索结果的方法和设备
    • WO2012047593A2
    • 2012-04-12
    • PCT/US2011053290
    • 2011-09-26
    • ALIBABA GROUP HOLDING LTDJIN HUAXINGZHENG WEIHUANG PENGYANG XULIN FENGFENG JIONGZHANG QIN
    • JIN HUAXINGZHENG WEIHUANG PENGYANG XULIN FENGFENG JIONGZHANG QIN
    • G06F17/30
    • G06F17/3053G06F17/30964
    • Ordering search results may include obtaining an exposed log file from a log system, computing a Bayesian posterior probability for relevancy between the log file and a search request, computing an expected value of the relevancy between the log file and the search request based on the Bayesian posterior probability, storing the search request and an identifier of the log file as a key and the expected value of the relevancy between the log file and the search request as a value into a search data structure, in response to receiving a search request submitted by a user, finding expected values of relevancy between the submitted search request and log files that are relevant to the submitted search request from the search data structure, and ordering the found log files in a descending order of the expected values.
    • 订购搜索结果可以包括从日志系统获取暴露的日志文件,计算日志文件和搜索请求之间的相关性的贝叶斯后验概率,基于贝叶斯计算日志文件和搜索请求之间的相关性的期望值 后验概率,响应于接收到提交的搜索请求而将搜索请求和作为密钥的日志文件的标识符和日志文件和搜索请求之间的相关性的期望值作为值存储到搜索数据结构中 一个用户,从搜索数据结构中找到所提交的搜索请求和与提交的搜索请求相关的日志文件之间的相关性的预期值,并按照预期值的降序对找到的日志文件进行排序。
    • 5. 发明申请
    • MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS
    • 存储器系统和数据,命令和地址信号的方法
    • WO2006026526A3
    • 2006-05-04
    • PCT/US2005030593
    • 2005-08-26
    • MICRON TECHNOLOGY INCLIN FENGKEETH BRENTJOHNSON BRIANLEE SEONG-HOON
    • LIN FENGKEETH BRENTJOHNSON BRIANLEE SEONG-HOON
    • H04L7/00G06F12/16
    • G11C7/109G11C7/1006G11C7/1078G11C7/1087G11C7/22G11C7/222
    • A memory system couples command, address or write data signals from a memory controller to a memory device and read data signals from the memory device to the memory controller. A respective strobe generator circuit in each of the memory controller and the memory device each generates an in-phase strobe signal and a quadrature strobe signal. Command, address or write data signals stored in respective output latches in the memory controller are clocked by the in-phase signals from the internal strobe generator circuit. These command, address or write data signals are latched into input latches in the memory device by the quadrature strobe signal coupled from the memory controller to the memory device. In substantially the same manner, read data signals are coupled from the memory device to the memory controller using the in-phase and quadrature strobe signals generated by the internal strobe generator circuit.
    • 存储器系统将来自存储器控制器的命令,地址或写入数据信号耦合到存储器设备,并将数据信号从存储器设备读取到存储器控制器。 存储器控制器和存储器设备中的每一个中的相应选通脉冲发生器电路均产生同相选通信号和正交选通信号。 存储在存储器控制器中的各个输出锁存器中的命令,地址或写入数据信号由来自内部选通脉冲发生器电路的同相信号计时。 这些命令,地址或写入数据信号被从存储器控制器耦合到存储器装置的正交选通信号锁存到存储器装置中的输入锁存器中。 以基本上相同的方式,使用内部选通脉冲发生器电路产生的同相和正交选通信号将读取数据信号从存储器装置耦合到存储器控制器。
    • 10. 发明申请
    • METHODS AND APPARATUS FOR DIVIDING A CLOCK SIGNAL
    • 用于划分时钟信号的方法和装置
    • WO2007012010A2
    • 2007-01-25
    • PCT/US2006028045
    • 2006-07-17
    • MICRON TECHNOLOGY INCLIN FENG
    • LIN FENG
    • G06F1/06
    • H03K23/44G06F1/04H03K23/60
    • There is provided a true single phase logic clock divider (20) that is configured to divide a clock signal (46) by increments of two, three, four, or six. Because the true single phase logic clock divider (20) is based on true single phase logic instead of static logic, the true single phase logic clock divider (20) is able to reliably divide clock signals (46) that could not reliably be divided by clock dividers based on static logic gates. There is also provided a method comprising receiving an input signal (46) with a frequency between 2.5 gigahertz and 4 gigahertz and producing an output signal (54) with a frequency approximately one-third of the frequency of the input signal.
    • 提供了一个真正的单相逻辑时钟分频器(20),其被配置为以两个,三个,四个或六个增量分频时钟信号(46)。 因为真正的单相逻辑时钟分频器(20)基于真正的单相逻辑而不是静态逻辑,所以真正的单相逻辑时钟分频器(20)能够可靠地分频时钟信号(46),该时钟信号不能被 基于静态逻辑门的时钟分频器。 还提供了一种方法,包括接收频率在2.5千兆赫和4千兆赫之间的输入信号(46),并产生频率大约为输入信号频率的三分之一的输出信号(54)。